Discussion:
[gem5-dev] Review Request: Initial patch to make gem5 compile with clang/llvm
(too old to reply)
Koan-Sin Tan
2012-01-11 07:27:57 UTC
Permalink
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Date: Wed, Jan 11, 2012 at 3:18 PM
Subject: Review Request: Initial patch to make gem5 compile with clang/llvm
To: koansin.tan-***@public.gmane.org


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---------- Forwarded message ----------
From: "Koan-Sin Tan" <koansin.tan-***@public.gmane.org>
To: "Default" <gem5-dev-1Gs4CP2/***@public.gmane.org>, "Koan-Sin Tan" <koansin.tan-***@public.gmane.org>
Cc:
Date: Wed, 11 Jan 2012 07:18:13 -0000
Subject: Review Request: Initial patch to make gem5 compile with clang/llvm
This is an automatically generated e-mail. To reply, visit:
http://reviews.m5sim.org/r/986/
Review request for Default.
By Koan-Sin Tan.
Description

Initial patch to make gem5 compile with clang/llvm. Tested on Mac OS X
10.7.2 + clang/llvm from Xcode 4.2

Diffs

- SConstruct (UNKNOWN)
- src/SConscript (UNKNOWN)
- src/arch/alpha/isa/main.isa (UNKNOWN)
- src/arch/alpha/linux/process.cc (UNKNOWN)
- src/arch/alpha/process.cc (UNKNOWN)
- src/arch/alpha/tlb.hh (UNKNOWN)
- src/arch/alpha/tlb.cc (UNKNOWN)
- src/arch/alpha/tru64/process.cc (UNKNOWN)
- src/arch/arm/insts/static_inst.hh (UNKNOWN)
- src/arch/arm/insts/vfp.hh (UNKNOWN)
- src/arch/arm/isa/templates/basic.isa (UNKNOWN)
- src/arch/x86/bios/intelmp.cc (UNKNOWN)
- src/arch/x86/intmessage.hh (UNKNOWN)
- src/arch/x86/linux/syscalls.cc (UNKNOWN)
- src/arch/x86/process.cc (UNKNOWN)
- src/base/fast_alloc.cc (UNKNOWN)
- src/base/range_map.hh (UNKNOWN)
- src/base/stl_helpers.hh (UNKNOWN)
- src/cpu/func_unit.hh (UNKNOWN)
- src/cpu/inorder/thread_context.hh (UNKNOWN)
- src/cpu/inorder/thread_state.hh (UNKNOWN)
- src/cpu/o3/iew.hh (UNKNOWN)
- src/cpu/o3/inst_queue.hh (UNKNOWN)
- src/cpu/o3/mem_dep_unit.cc (UNKNOWN)
- src/cpu/o3/sat_counter.hh (UNKNOWN)
- src/cpu/o3/thread_context.hh (UNKNOWN)
- src/cpu/o3/thread_state.hh (UNKNOWN)
- src/cpu/static_inst.hh (UNKNOWN)
- src/cpu/thread_context.hh (UNKNOWN)
- src/cpu/thread_state.hh (UNKNOWN)
- src/dev/alpha/tsunami_cchip.cc (UNKNOWN)
- src/dev/alpha/tsunami_io.cc (UNKNOWN)
- src/dev/arm/pl111.cc (UNKNOWN)
- src/dev/copy_engine.cc (UNKNOWN)
- src/dev/ide_ctrl.cc (UNKNOWN)
- src/dev/ns_gige.cc (UNKNOWN)
- src/dev/pciconfigall.cc (UNKNOWN)
- src/dev/pcidev.cc (UNKNOWN)
- src/mem/cache/base.hh (UNKNOWN)
- src/mem/packet.hh (UNKNOWN)
- src/mem/ruby/system/Sequencer.hh (UNKNOWN)
- src/python/m5/SimObject.py (UNKNOWN)
- src/sim/core.hh (UNKNOWN)
- src/sim/process.hh (UNKNOWN)

View Diff <http://reviews.m5sim.org/r/986/diff/>
--
// koan-sin tan
Nathan Binkert
2012-01-11 18:48:20 UTC
Permalink
-----------------------------------------------------------
This is an automatically generated e-mail. To reply, visit:
http://reviews.m5sim.org/r/986/#review1905
-----------------------------------------------------------


This is awesome! Thanks for the work. There are two things I don't like: the namespace moves and the pkt->Packet:: stuff. I'd like to figure out ways to make it work without that.

Also, did you make sure that this all still compiles with GCC?


src/arch/alpha/process.cc
<http://reviews.m5sim.org/r/986/#comment2404>

Can you explain a little bit about what's going on here that this is necessary? I'd like to figure out another way to do this that doesn't seem so hackish.



src/arch/x86/intmessage.hh
<http://reviews.m5sim.org/r/986/#comment2406>

This is odd. Any idea what's going on here?



src/base/fast_alloc.cc
<http://reviews.m5sim.org/r/986/#comment2407>

Anyone know why this pragma is here in the first place? Be nice to see a comment if anyone has a clue. Steve? Your code :)



src/cpu/func_unit.hh
<http://reviews.m5sim.org/r/986/#comment2408>

Why is this done? Does clang differentiate between classes and structs?



src/cpu/o3/inst_queue.hh
<http://reviews.m5sim.org/r/986/#comment2409>

Don't comment out code. Just delete it.



src/dev/copy_engine.cc
<http://reviews.m5sim.org/r/986/#comment2410>

I'd like to figure out why this is necessary and make it go away.



src/python/m5/SimObject.py
<http://reviews.m5sim.org/r/986/#comment2411>

Dont' comment out code, please remove it.


- Nathan
-----------------------------------------------------------
http://reviews.m5sim.org/r/986/
-----------------------------------------------------------
(Updated 2012-01-10 23:18:13)
Review request for Default.
Summary
-------
Initial patch to make gem5 compile with clang/llvm. Tested on Mac OS X 10.7.2 + clang/llvm from Xcode 4.2
Diffs
-----
SConstruct UNKNOWN
src/SConscript UNKNOWN
src/arch/alpha/isa/main.isa UNKNOWN
src/arch/alpha/linux/process.cc UNKNOWN
src/arch/alpha/process.cc UNKNOWN
src/arch/alpha/tlb.hh UNKNOWN
src/arch/alpha/tlb.cc UNKNOWN
src/arch/alpha/tru64/process.cc UNKNOWN
src/arch/arm/insts/static_inst.hh UNKNOWN
src/arch/arm/insts/vfp.hh UNKNOWN
src/arch/arm/isa/templates/basic.isa UNKNOWN
src/arch/x86/bios/intelmp.cc UNKNOWN
src/arch/x86/intmessage.hh UNKNOWN
src/arch/x86/linux/syscalls.cc UNKNOWN
src/arch/x86/process.cc UNKNOWN
src/base/fast_alloc.cc UNKNOWN
src/base/range_map.hh UNKNOWN
src/base/stl_helpers.hh UNKNOWN
src/cpu/func_unit.hh UNKNOWN
src/cpu/inorder/thread_context.hh UNKNOWN
src/cpu/inorder/thread_state.hh UNKNOWN
src/cpu/o3/iew.hh UNKNOWN
src/cpu/o3/inst_queue.hh UNKNOWN
src/cpu/o3/mem_dep_unit.cc UNKNOWN
src/cpu/o3/sat_counter.hh UNKNOWN
src/cpu/o3/thread_context.hh UNKNOWN
src/cpu/o3/thread_state.hh UNKNOWN
src/cpu/static_inst.hh UNKNOWN
src/cpu/thread_context.hh UNKNOWN
src/cpu/thread_state.hh UNKNOWN
src/dev/alpha/tsunami_cchip.cc UNKNOWN
src/dev/alpha/tsunami_io.cc UNKNOWN
src/dev/arm/pl111.cc UNKNOWN
src/dev/copy_engine.cc UNKNOWN
src/dev/ide_ctrl.cc UNKNOWN
src/dev/ns_gige.cc UNKNOWN
src/dev/pciconfigall.cc UNKNOWN
src/dev/pcidev.cc UNKNOWN
src/mem/cache/base.hh UNKNOWN
src/mem/packet.hh UNKNOWN
src/mem/ruby/system/Sequencer.hh UNKNOWN
src/python/m5/SimObject.py UNKNOWN
src/sim/core.hh UNKNOWN
src/sim/process.hh UNKNOWN
Diff: http://reviews.m5sim.org/r/986/diff
Testing
-------
Thanks,
Koan-Sin
Steve Reinhardt
2012-01-11 19:15:29 UTC
Permalink
Post by Nathan Binkert
src/base/fast_alloc.cc, line 45
<http://reviews.m5sim.org/r/986/diff/1/?file=20534#file20534line45>
Anyone know why this pragma is here in the first place? Be nice to see a comment if anyone has a clue. Steve? Your code :)
Actually I don't know anything about this, but it's so old it predates our history (goes back to changeset 2!) so I can't determine whether it's because someone else put it in or if I did and just forgot about it. For my own dignity I will claim the former.


- Steve


-----------------------------------------------------------
This is an automatically generated e-mail. To reply, visit:
http://reviews.m5sim.org/r/986/#review1905
-----------------------------------------------------------
Post by Nathan Binkert
-----------------------------------------------------------
http://reviews.m5sim.org/r/986/
-----------------------------------------------------------
(Updated 2012-01-10 23:18:13)
Review request for Default.
Summary
-------
Initial patch to make gem5 compile with clang/llvm. Tested on Mac OS X 10.7.2 + clang/llvm from Xcode 4.2
Diffs
-----
SConstruct UNKNOWN
src/SConscript UNKNOWN
src/arch/alpha/isa/main.isa UNKNOWN
src/arch/alpha/linux/process.cc UNKNOWN
src/arch/alpha/process.cc UNKNOWN
src/arch/alpha/tlb.hh UNKNOWN
src/arch/alpha/tlb.cc UNKNOWN
src/arch/alpha/tru64/process.cc UNKNOWN
src/arch/arm/insts/static_inst.hh UNKNOWN
src/arch/arm/insts/vfp.hh UNKNOWN
src/arch/arm/isa/templates/basic.isa UNKNOWN
src/arch/x86/bios/intelmp.cc UNKNOWN
src/arch/x86/intmessage.hh UNKNOWN
src/arch/x86/linux/syscalls.cc UNKNOWN
src/arch/x86/process.cc UNKNOWN
src/base/fast_alloc.cc UNKNOWN
src/base/range_map.hh UNKNOWN
src/base/stl_helpers.hh UNKNOWN
src/cpu/func_unit.hh UNKNOWN
src/cpu/inorder/thread_context.hh UNKNOWN
src/cpu/inorder/thread_state.hh UNKNOWN
src/cpu/o3/iew.hh UNKNOWN
src/cpu/o3/inst_queue.hh UNKNOWN
src/cpu/o3/mem_dep_unit.cc UNKNOWN
src/cpu/o3/sat_counter.hh UNKNOWN
src/cpu/o3/thread_context.hh UNKNOWN
src/cpu/o3/thread_state.hh UNKNOWN
src/cpu/static_inst.hh UNKNOWN
src/cpu/thread_context.hh UNKNOWN
src/cpu/thread_state.hh UNKNOWN
src/dev/alpha/tsunami_cchip.cc UNKNOWN
src/dev/alpha/tsunami_io.cc UNKNOWN
src/dev/arm/pl111.cc UNKNOWN
src/dev/copy_engine.cc UNKNOWN
src/dev/ide_ctrl.cc UNKNOWN
src/dev/ns_gige.cc UNKNOWN
src/dev/pciconfigall.cc UNKNOWN
src/dev/pcidev.cc UNKNOWN
src/mem/cache/base.hh UNKNOWN
src/mem/packet.hh UNKNOWN
src/mem/ruby/system/Sequencer.hh UNKNOWN
src/python/m5/SimObject.py UNKNOWN
src/sim/core.hh UNKNOWN
src/sim/process.hh UNKNOWN
Diff: http://reviews.m5sim.org/r/986/diff
Testing
-------
Thanks,
Koan-Sin
nathan binkert
2012-01-11 19:18:29 UTC
Permalink
We should just remove it. It has to do with template instantiation stuff
that we aren't worried about anyway. I'm 99.999% sure that it won't have
any effect at all.

Nate
Post by Koan-Sin Tan
http://reviews.m5sim.org/r/986/
src/base/fast_alloc.cc<http://reviews.m5sim.org/r/986/diff/1/?file=20534#file20534line45> (Diff
revision 1)
44
#pragma implementation
45
#pragma implementation
Anyone know why this pragma is here in the first place? Be nice to see a comment if anyone has a clue. Steve? Your code :)
Actually I don't know anything about this, but it's so old it predates our history (goes back to changeset 2!) so I can't determine whether it's because someone else put it in or if I did and just forgot about it. For my own dignity I will claim the former.
- Steve
Review request for Default.
By Koan-Sin Tan.
*Updated 2012-01-10 23:18:13*
Description
Initial patch to make gem5 compile with clang/llvm. Tested on Mac OS X 10.7.2 + clang/llvm from Xcode 4.2
Diffs
- SConstruct (UNKNOWN)
- src/SConscript (UNKNOWN)
- src/arch/alpha/isa/main.isa (UNKNOWN)
- src/arch/alpha/linux/process.cc (UNKNOWN)
- src/arch/alpha/process.cc (UNKNOWN)
- src/arch/alpha/tlb.hh (UNKNOWN)
- src/arch/alpha/tlb.cc (UNKNOWN)
- src/arch/alpha/tru64/process.cc (UNKNOWN)
- src/arch/arm/insts/static_inst.hh (UNKNOWN)
- src/arch/arm/insts/vfp.hh (UNKNOWN)
- src/arch/arm/isa/templates/basic.isa (UNKNOWN)
- src/arch/x86/bios/intelmp.cc (UNKNOWN)
- src/arch/x86/intmessage.hh (UNKNOWN)
- src/arch/x86/linux/syscalls.cc (UNKNOWN)
- src/arch/x86/process.cc (UNKNOWN)
- src/base/fast_alloc.cc (UNKNOWN)
- src/base/range_map.hh (UNKNOWN)
- src/base/stl_helpers.hh (UNKNOWN)
- src/cpu/func_unit.hh (UNKNOWN)
- src/cpu/inorder/thread_context.hh (UNKNOWN)
- src/cpu/inorder/thread_state.hh (UNKNOWN)
- src/cpu/o3/iew.hh (UNKNOWN)
- src/cpu/o3/inst_queue.hh (UNKNOWN)
- src/cpu/o3/mem_dep_unit.cc (UNKNOWN)
- src/cpu/o3/sat_counter.hh (UNKNOWN)
- src/cpu/o3/thread_context.hh (UNKNOWN)
- src/cpu/o3/thread_state.hh (UNKNOWN)
- src/cpu/static_inst.hh (UNKNOWN)
- src/cpu/thread_context.hh (UNKNOWN)
- src/cpu/thread_state.hh (UNKNOWN)
- src/dev/alpha/tsunami_cchip.cc (UNKNOWN)
- src/dev/alpha/tsunami_io.cc (UNKNOWN)
- src/dev/arm/pl111.cc (UNKNOWN)
- src/dev/copy_engine.cc (UNKNOWN)
- src/dev/ide_ctrl.cc (UNKNOWN)
- src/dev/ns_gige.cc (UNKNOWN)
- src/dev/pciconfigall.cc (UNKNOWN)
- src/dev/pcidev.cc (UNKNOWN)
- src/mem/cache/base.hh (UNKNOWN)
- src/mem/packet.hh (UNKNOWN)
- src/mem/ruby/system/Sequencer.hh (UNKNOWN)
- src/python/m5/SimObject.py (UNKNOWN)
- src/sim/core.hh (UNKNOWN)
- src/sim/process.hh (UNKNOWN)
View Diff <http://reviews.m5sim.org/r/986/diff/>
Koan-Sin Tan
2012-01-12 01:45:02 UTC
Permalink
Post by Nathan Binkert
Post by Nathan Binkert
This is awesome! Thanks for the work. There are two things I don't like: the namespace moves and the pkt->Packet:: stuff. I'd like to figure out ways to make it work without that.
Also, did you make sure that this all still compiles with GCC?
Thanks, let's start from easy stuff, the pkt->Packet:: stuff. WIthout Packet::, clang complains "lookup of 'set' in member access expression is ambiguous", because of the ambiguity between STL set and Packet::set. I can think of two trivial alternative ways to deal with the problem.
1. add '-Wno-ambiguous-member-template' to CCFLAGS
2. get rid of "using namespace std;", which means adding "std::" when necessary
Which one do you prefer? Did I miss any trivial solution?

The namespace move is trick. Yes, it's a hack. Let's use the change in 'src/arch/alpha/isa/main.isa" as an example to illustrate this problem. Without the change, I got error message like:
In file included from build/ALPHA_FS/arch/alpha/atomic_simple_cpu_exec.cc:17: build/ALPHA_FS/arch/generic/memhelpers.hh:67:15: error: call to function 'gtoh' that
is neither visible in the template definition nor found by argument-dependent
lookup
mem = gtoh(mem);
I know we should use 'using namespace AlphaISA;" or "using namespace LittleEndianGuest;' earlier so that clang will know 'gtoh()' is the the LittleEndianGuest one. But I don't know where is the right place to add it. Any suggestion?

And, yes, I compiled changed code with gcc-4.2 (what comes with Xocde 4.2) and gcc-4.6 without problem.


- Koan-Sin


-----------------------------------------------------------
This is an automatically generated e-mail. To reply, visit:
http://reviews.m5sim.org/r/986/#review1905
-----------------------------------------------------------
Post by Nathan Binkert
-----------------------------------------------------------
http://reviews.m5sim.org/r/986/
-----------------------------------------------------------
(Updated 2012-01-10 23:18:13)
Review request for Default.
Summary
-------
Initial patch to make gem5 compile with clang/llvm. Tested on Mac OS X 10.7.2 + clang/llvm from Xcode 4.2
Diffs
-----
SConstruct UNKNOWN
src/SConscript UNKNOWN
src/arch/alpha/isa/main.isa UNKNOWN
src/arch/alpha/linux/process.cc UNKNOWN
src/arch/alpha/process.cc UNKNOWN
src/arch/alpha/tlb.hh UNKNOWN
src/arch/alpha/tlb.cc UNKNOWN
src/arch/alpha/tru64/process.cc UNKNOWN
src/arch/arm/insts/static_inst.hh UNKNOWN
src/arch/arm/insts/vfp.hh UNKNOWN
src/arch/arm/isa/templates/basic.isa UNKNOWN
src/arch/x86/bios/intelmp.cc UNKNOWN
src/arch/x86/intmessage.hh UNKNOWN
src/arch/x86/linux/syscalls.cc UNKNOWN
src/arch/x86/process.cc UNKNOWN
src/base/fast_alloc.cc UNKNOWN
src/base/range_map.hh UNKNOWN
src/base/stl_helpers.hh UNKNOWN
src/cpu/func_unit.hh UNKNOWN
src/cpu/inorder/thread_context.hh UNKNOWN
src/cpu/inorder/thread_state.hh UNKNOWN
src/cpu/o3/iew.hh UNKNOWN
src/cpu/o3/inst_queue.hh UNKNOWN
src/cpu/o3/mem_dep_unit.cc UNKNOWN
src/cpu/o3/sat_counter.hh UNKNOWN
src/cpu/o3/thread_context.hh UNKNOWN
src/cpu/o3/thread_state.hh UNKNOWN
src/cpu/static_inst.hh UNKNOWN
src/cpu/thread_context.hh UNKNOWN
src/cpu/thread_state.hh UNKNOWN
src/dev/alpha/tsunami_cchip.cc UNKNOWN
src/dev/alpha/tsunami_io.cc UNKNOWN
src/dev/arm/pl111.cc UNKNOWN
src/dev/copy_engine.cc UNKNOWN
src/dev/ide_ctrl.cc UNKNOWN
src/dev/ns_gige.cc UNKNOWN
src/dev/pciconfigall.cc UNKNOWN
src/dev/pcidev.cc UNKNOWN
src/mem/cache/base.hh UNKNOWN
src/mem/packet.hh UNKNOWN
src/mem/ruby/system/Sequencer.hh UNKNOWN
src/python/m5/SimObject.py UNKNOWN
src/sim/core.hh UNKNOWN
src/sim/process.hh UNKNOWN
Diff: http://reviews.m5sim.org/r/986/diff
Testing
-------
Thanks,
Koan-Sin
Koan-Sin Tan
2012-01-12 02:57:08 UTC
Permalink
Post by Nathan Binkert
src/cpu/func_unit.hh, line 50
<http://reviews.m5sim.org/r/986/diff/1/?file=20537#file20537line50>
Why is this done? Does clang differentiate between classes and structs?
With -Wall on, clang warns about the difference between classes and structs. And I think C++ standard does care the difference, although GCC dones't. Anyway, if you don't like these class/struct changes, I can turn off them by adding "-Wno-mismatched-tags" to CCFLAGS.


- Koan-Sin


-----------------------------------------------------------
This is an automatically generated e-mail. To reply, visit:
http://reviews.m5sim.org/r/986/#review1905
-----------------------------------------------------------
Post by Nathan Binkert
-----------------------------------------------------------
http://reviews.m5sim.org/r/986/
-----------------------------------------------------------
(Updated 2012-01-10 23:18:13)
Review request for Default.
Summary
-------
Initial patch to make gem5 compile with clang/llvm. Tested on Mac OS X 10.7.2 + clang/llvm from Xcode 4.2
Diffs
-----
SConstruct UNKNOWN
src/SConscript UNKNOWN
src/arch/alpha/isa/main.isa UNKNOWN
src/arch/alpha/linux/process.cc UNKNOWN
src/arch/alpha/process.cc UNKNOWN
src/arch/alpha/tlb.hh UNKNOWN
src/arch/alpha/tlb.cc UNKNOWN
src/arch/alpha/tru64/process.cc UNKNOWN
src/arch/arm/insts/static_inst.hh UNKNOWN
src/arch/arm/insts/vfp.hh UNKNOWN
src/arch/arm/isa/templates/basic.isa UNKNOWN
src/arch/x86/bios/intelmp.cc UNKNOWN
src/arch/x86/intmessage.hh UNKNOWN
src/arch/x86/linux/syscalls.cc UNKNOWN
src/arch/x86/process.cc UNKNOWN
src/base/fast_alloc.cc UNKNOWN
src/base/range_map.hh UNKNOWN
src/base/stl_helpers.hh UNKNOWN
src/cpu/func_unit.hh UNKNOWN
src/cpu/inorder/thread_context.hh UNKNOWN
src/cpu/inorder/thread_state.hh UNKNOWN
src/cpu/o3/iew.hh UNKNOWN
src/cpu/o3/inst_queue.hh UNKNOWN
src/cpu/o3/mem_dep_unit.cc UNKNOWN
src/cpu/o3/sat_counter.hh UNKNOWN
src/cpu/o3/thread_context.hh UNKNOWN
src/cpu/o3/thread_state.hh UNKNOWN
src/cpu/static_inst.hh UNKNOWN
src/cpu/thread_context.hh UNKNOWN
src/cpu/thread_state.hh UNKNOWN
src/dev/alpha/tsunami_cchip.cc UNKNOWN
src/dev/alpha/tsunami_io.cc UNKNOWN
src/dev/arm/pl111.cc UNKNOWN
src/dev/copy_engine.cc UNKNOWN
src/dev/ide_ctrl.cc UNKNOWN
src/dev/ns_gige.cc UNKNOWN
src/dev/pciconfigall.cc UNKNOWN
src/dev/pcidev.cc UNKNOWN
src/mem/cache/base.hh UNKNOWN
src/mem/packet.hh UNKNOWN
src/mem/ruby/system/Sequencer.hh UNKNOWN
src/python/m5/SimObject.py UNKNOWN
src/sim/core.hh UNKNOWN
src/sim/process.hh UNKNOWN
Diff: http://reviews.m5sim.org/r/986/diff
Testing
-------
Thanks,
Koan-Sin
Nathan Binkert
2012-01-12 18:56:18 UTC
Permalink
Post by Steve Reinhardt
src/base/fast_alloc.cc, line 45
<http://reviews.m5sim.org/r/986/diff/1/?file=20534#file20534line45>
Anyone know why this pragma is here in the first place? Be nice to see a comment if anyone has a clue. Steve? Your code :)
Actually I don't know anything about this, but it's so old it predates our history (goes back to changeset 2!) so I can't determine whether it's because someone else put it in or if I did and just forgot about it. For my own dignity I will claim the former.
I think that you can just safely remove the #pragma. It's for a gcc feature that we just don't (and have never) used.
Post by Steve Reinhardt
src/cpu/func_unit.hh, line 50
<http://reviews.m5sim.org/r/986/diff/1/?file=20537#file20537line50>
Why is this done? Does clang differentiate between classes and structs?
With -Wall on, clang warns about the difference between classes and structs. And I think C++ standard does care the difference, although GCC dones't. Anyway, if you don't like these class/struct changes, I can turn off them by adding "-Wno-mismatched-tags" to CCFLAGS.
I'm ok with these changes and I slightly prefer to keep classes and structs consistent if that is the proper thing to do. I see that you ripped them out in your newer diff and turned off the warning with CCFLAGS. If you'd prefer to just keep that, I'm OK with that too.


- Nathan


-----------------------------------------------------------
This is an automatically generated e-mail. To reply, visit:
http://reviews.m5sim.org/r/986/#review1905
-----------------------------------------------------------
Post by Steve Reinhardt
-----------------------------------------------------------
http://reviews.m5sim.org/r/986/
-----------------------------------------------------------
(Updated 2012-01-12 04:38:10)
Review request for Default.
Summary
-------
Initial patch to make gem5 compile with clang/llvm. Tested on Mac OS X 10.7.2 + clang/llvm from Xcode 4.2
Diffs
-----
SConstruct UNKNOWN
src/SConscript UNKNOWN
src/arch/alpha/isa_traits.hh UNKNOWN
src/arch/alpha/tlb.cc UNKNOWN
src/arch/arm/insts/static_inst.hh UNKNOWN
src/arch/arm/insts/vfp.hh UNKNOWN
src/arch/arm/isa/templates/basic.isa UNKNOWN
src/arch/x86/bios/intelmp.cc UNKNOWN
src/arch/x86/isa_traits.hh UNKNOWN
src/base/fast_alloc.cc UNKNOWN
src/base/range_map.hh UNKNOWN
src/base/stl_helpers.hh UNKNOWN
src/cpu/o3/decode_impl.hh UNKNOWN
src/cpu/o3/iew.hh UNKNOWN
src/cpu/o3/inst_queue.hh UNKNOWN
src/cpu/o3/inst_queue_impl.hh UNKNOWN
src/cpu/o3/mem_dep_unit.cc UNKNOWN
src/cpu/o3/sat_counter.hh UNKNOWN
src/dev/alpha/tsunami_cchip.cc UNKNOWN
src/dev/alpha/tsunami_io.cc UNKNOWN
src/dev/arm/pl111.hh UNKNOWN
src/dev/arm/pl111.cc UNKNOWN
src/dev/copy_engine.cc UNKNOWN
src/dev/ide_ctrl.cc UNKNOWN
src/dev/ns_gige.cc UNKNOWN
src/dev/pciconfigall.cc UNKNOWN
src/dev/pcidev.cc UNKNOWN
src/mem/cache/base.hh UNKNOWN
Diff: http://reviews.m5sim.org/r/986/diff
Testing
-------
Thanks,
Koan-Sin
Koan-Sin Tan
2012-01-12 12:38:10 UTC
Permalink
-----------------------------------------------------------
This is an automatically generated e-mail. To reply, visit:
http://reviews.m5sim.org/r/986/
-----------------------------------------------------------

(Updated 2012-01-12 04:38:10.408654)


Review request for Default.


Changes
-------

1. remove pkt->Packet:: stuff, by removing 'using namespace std' and adding std:: when necessary
2. get rid of namespace move, by adding 'using namespace xxx' to src/arc/xxx/isa_traits.hh
3. add '-Wno-mismatched-tags' to CCFLAGS so that we can avoid class/struct changes


Summary
-------

Initial patch to make gem5 compile with clang/llvm. Tested on Mac OS X 10.7.2 + clang/llvm from Xcode 4.2


Diffs (updated)
-----

SConstruct UNKNOWN
src/SConscript UNKNOWN
src/arch/alpha/isa_traits.hh UNKNOWN
src/arch/alpha/tlb.cc UNKNOWN
src/arch/arm/insts/static_inst.hh UNKNOWN
src/arch/arm/insts/vfp.hh UNKNOWN
src/arch/arm/isa/templates/basic.isa UNKNOWN
src/arch/x86/bios/intelmp.cc UNKNOWN
src/arch/x86/isa_traits.hh UNKNOWN
src/base/fast_alloc.cc UNKNOWN
src/base/range_map.hh UNKNOWN
src/base/stl_helpers.hh UNKNOWN
src/cpu/o3/decode_impl.hh UNKNOWN
src/cpu/o3/iew.hh UNKNOWN
src/cpu/o3/inst_queue.hh UNKNOWN
src/cpu/o3/inst_queue_impl.hh UNKNOWN
src/cpu/o3/mem_dep_unit.cc UNKNOWN
src/cpu/o3/sat_counter.hh UNKNOWN
src/dev/alpha/tsunami_cchip.cc UNKNOWN
src/dev/alpha/tsunami_io.cc UNKNOWN
src/dev/arm/pl111.hh UNKNOWN
src/dev/arm/pl111.cc UNKNOWN
src/dev/copy_engine.cc UNKNOWN
src/dev/ide_ctrl.cc UNKNOWN
src/dev/ns_gige.cc UNKNOWN
src/dev/pciconfigall.cc UNKNOWN
src/dev/pcidev.cc UNKNOWN
src/mem/cache/base.hh UNKNOWN

Diff: http://reviews.m5sim.org/r/986/diff


Testing
-------


Thanks,

Koan-Sin
Andreas Hansson
2012-01-12 14:05:32 UTC
Permalink
-----------------------------------------------------------
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-----------------------------------------------------------



src/arch/x86/bios/intelmp.cc
<http://reviews.m5sim.org/r/986/#comment2436>

Should we do this based on if(sizeof(T) > 1), else guestVal = 0?




src/arch/x86/isa_traits.hh
<http://reviews.m5sim.org/r/986/#comment2435>

Opening namespaces in headers is never a good idea. This essentially means every place we include it this namespace is now opened. Is this really what we want?



src/dev/copy_engine.cc
<http://reviews.m5sim.org/r/986/#comment2437>

Why does the std cause a problem with the packet->set? Packet does not inherit from any STL container class. I don't get why there is any potential overloading.


- Andreas
Post by Nathan Binkert
-----------------------------------------------------------
http://reviews.m5sim.org/r/986/
-----------------------------------------------------------
(Updated 2012-01-12 04:38:10)
Review request for Default.
Summary
-------
Initial patch to make gem5 compile with clang/llvm. Tested on Mac OS X 10.7.2 + clang/llvm from Xcode 4.2
Diffs
-----
SConstruct UNKNOWN
src/SConscript UNKNOWN
src/arch/alpha/isa_traits.hh UNKNOWN
src/arch/alpha/tlb.cc UNKNOWN
src/arch/arm/insts/static_inst.hh UNKNOWN
src/arch/arm/insts/vfp.hh UNKNOWN
src/arch/arm/isa/templates/basic.isa UNKNOWN
src/arch/x86/bios/intelmp.cc UNKNOWN
src/arch/x86/isa_traits.hh UNKNOWN
src/base/fast_alloc.cc UNKNOWN
src/base/range_map.hh UNKNOWN
src/base/stl_helpers.hh UNKNOWN
src/cpu/o3/decode_impl.hh UNKNOWN
src/cpu/o3/iew.hh UNKNOWN
src/cpu/o3/inst_queue.hh UNKNOWN
src/cpu/o3/inst_queue_impl.hh UNKNOWN
src/cpu/o3/mem_dep_unit.cc UNKNOWN
src/cpu/o3/sat_counter.hh UNKNOWN
src/dev/alpha/tsunami_cchip.cc UNKNOWN
src/dev/alpha/tsunami_io.cc UNKNOWN
src/dev/arm/pl111.hh UNKNOWN
src/dev/arm/pl111.cc UNKNOWN
src/dev/copy_engine.cc UNKNOWN
src/dev/ide_ctrl.cc UNKNOWN
src/dev/ns_gige.cc UNKNOWN
src/dev/pciconfigall.cc UNKNOWN
src/dev/pcidev.cc UNKNOWN
src/mem/cache/base.hh UNKNOWN
Diff: http://reviews.m5sim.org/r/986/diff
Testing
-------
Thanks,
Koan-Sin
Koan-Sin Tan
2012-01-12 15:06:52 UTC
Permalink
Post by Nathan Binkert
src/arch/x86/bios/intelmp.cc, line 82
<http://reviews.m5sim.org/r/986/diff/2/?file=20759#file20759line82>
Should we do this based on if(sizeof(T) > 1), else guestVal = 0?
sounds good
Post by Nathan Binkert
src/arch/x86/isa_traits.hh, line 90
<http://reviews.m5sim.org/r/986/diff/2/?file=20760#file20760line90>
Opening namespaces in headers is never a good idea. This essentially means every place we include it this namespace is now opened. Is this really what we want?
There are some gtoh() in .hh files. I don't know how to get them compiled without making either big changes or ugly 'using namepace ...' before some "#include xxx.hh" yet
Post by Nathan Binkert
src/dev/copy_engine.cc, line 48
<http://reviews.m5sim.org/r/986/diff/2/?file=20774#file20774line48>
Why does the std cause a problem with the packet->set? Packet does not inherit from any STL container class. I don't get why there is any potential overloading.
this kind of ambiguity has nothing to do with inheritance as far as I can tell


- Koan-Sin


-----------------------------------------------------------
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-----------------------------------------------------------
Post by Nathan Binkert
-----------------------------------------------------------
http://reviews.m5sim.org/r/986/
-----------------------------------------------------------
(Updated 2012-01-12 04:38:10)
Review request for Default.
Summary
-------
Initial patch to make gem5 compile with clang/llvm. Tested on Mac OS X 10.7.2 + clang/llvm from Xcode 4.2
Diffs
-----
SConstruct UNKNOWN
src/SConscript UNKNOWN
src/arch/alpha/isa_traits.hh UNKNOWN
src/arch/alpha/tlb.cc UNKNOWN
src/arch/arm/insts/static_inst.hh UNKNOWN
src/arch/arm/insts/vfp.hh UNKNOWN
src/arch/arm/isa/templates/basic.isa UNKNOWN
src/arch/x86/bios/intelmp.cc UNKNOWN
src/arch/x86/isa_traits.hh UNKNOWN
src/base/fast_alloc.cc UNKNOWN
src/base/range_map.hh UNKNOWN
src/base/stl_helpers.hh UNKNOWN
src/cpu/o3/decode_impl.hh UNKNOWN
src/cpu/o3/iew.hh UNKNOWN
src/cpu/o3/inst_queue.hh UNKNOWN
src/cpu/o3/inst_queue_impl.hh UNKNOWN
src/cpu/o3/mem_dep_unit.cc UNKNOWN
src/cpu/o3/sat_counter.hh UNKNOWN
src/dev/alpha/tsunami_cchip.cc UNKNOWN
src/dev/alpha/tsunami_io.cc UNKNOWN
src/dev/arm/pl111.hh UNKNOWN
src/dev/arm/pl111.cc UNKNOWN
src/dev/copy_engine.cc UNKNOWN
src/dev/ide_ctrl.cc UNKNOWN
src/dev/ns_gige.cc UNKNOWN
src/dev/pciconfigall.cc UNKNOWN
src/dev/pcidev.cc UNKNOWN
src/mem/cache/base.hh UNKNOWN
Diff: http://reviews.m5sim.org/r/986/diff
Testing
-------
Thanks,
Koan-Sin
Nathan Binkert
2012-01-12 18:56:27 UTC
Permalink
Post by Koan-Sin Tan
src/arch/x86/isa_traits.hh, line 90
<http://reviews.m5sim.org/r/986/diff/2/?file=20760#file20760line90>
Opening namespaces in headers is never a good idea. This essentially means every place we include it this namespace is now opened. Is this really what we want?
There are some gtoh() in .hh files. I don't know how to get them compiled without making either big changes or ugly 'using namepace ...' before some "#include xxx.hh" yet
What really needs to happen is that you get the endianness from the ISA. I believe that you may be able to simply say TheISA::gtoh() and make it work. Can you try that?


- Nathan


-----------------------------------------------------------
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http://reviews.m5sim.org/r/986/#review1929
-----------------------------------------------------------
Post by Koan-Sin Tan
-----------------------------------------------------------
http://reviews.m5sim.org/r/986/
-----------------------------------------------------------
(Updated 2012-01-12 04:38:10)
Review request for Default.
Summary
-------
Initial patch to make gem5 compile with clang/llvm. Tested on Mac OS X 10.7.2 + clang/llvm from Xcode 4.2
Diffs
-----
SConstruct UNKNOWN
src/SConscript UNKNOWN
src/arch/alpha/isa_traits.hh UNKNOWN
src/arch/alpha/tlb.cc UNKNOWN
src/arch/arm/insts/static_inst.hh UNKNOWN
src/arch/arm/insts/vfp.hh UNKNOWN
src/arch/arm/isa/templates/basic.isa UNKNOWN
src/arch/x86/bios/intelmp.cc UNKNOWN
src/arch/x86/isa_traits.hh UNKNOWN
src/base/fast_alloc.cc UNKNOWN
src/base/range_map.hh UNKNOWN
src/base/stl_helpers.hh UNKNOWN
src/cpu/o3/decode_impl.hh UNKNOWN
src/cpu/o3/iew.hh UNKNOWN
src/cpu/o3/inst_queue.hh UNKNOWN
src/cpu/o3/inst_queue_impl.hh UNKNOWN
src/cpu/o3/mem_dep_unit.cc UNKNOWN
src/cpu/o3/sat_counter.hh UNKNOWN
src/dev/alpha/tsunami_cchip.cc UNKNOWN
src/dev/alpha/tsunami_io.cc UNKNOWN
src/dev/arm/pl111.hh UNKNOWN
src/dev/arm/pl111.cc UNKNOWN
src/dev/copy_engine.cc UNKNOWN
src/dev/ide_ctrl.cc UNKNOWN
src/dev/ns_gige.cc UNKNOWN
src/dev/pciconfigall.cc UNKNOWN
src/dev/pcidev.cc UNKNOWN
src/mem/cache/base.hh UNKNOWN
Diff: http://reviews.m5sim.org/r/986/diff
Testing
-------
Thanks,
Koan-Sin
Koan-Sin Tan
2012-01-13 01:17:45 UTC
Permalink
Post by Koan-Sin Tan
src/arch/x86/isa_traits.hh, line 90
<http://reviews.m5sim.org/r/986/diff/2/?file=20760#file20760line90>
Opening namespaces in headers is never a good idea. This essentially means every place we include it this namespace is now opened. Is this really what we want?
There are some gtoh() in .hh files. I don't know how to get them compiled without making either big changes or ugly 'using namepace ...' before some "#include xxx.hh" yet
What really needs to happen is that you get the endianness from the ISA. I believe that you may be able to simply say TheISA::gtoh() and make it work. Can you try that?
Nathan,
Yes, adding "TheISA::" works. I'll update the patch later


- Koan-Sin


-----------------------------------------------------------
This is an automatically generated e-mail. To reply, visit:
http://reviews.m5sim.org/r/986/#review1929
-----------------------------------------------------------
Post by Koan-Sin Tan
-----------------------------------------------------------
http://reviews.m5sim.org/r/986/
-----------------------------------------------------------
(Updated 2012-01-12 04:38:10)
Review request for Default.
Summary
-------
Initial patch to make gem5 compile with clang/llvm. Tested on Mac OS X 10.7.2 + clang/llvm from Xcode 4.2
Diffs
-----
SConstruct UNKNOWN
src/SConscript UNKNOWN
src/arch/alpha/isa_traits.hh UNKNOWN
src/arch/alpha/tlb.cc UNKNOWN
src/arch/arm/insts/static_inst.hh UNKNOWN
src/arch/arm/insts/vfp.hh UNKNOWN
src/arch/arm/isa/templates/basic.isa UNKNOWN
src/arch/x86/bios/intelmp.cc UNKNOWN
src/arch/x86/isa_traits.hh UNKNOWN
src/base/fast_alloc.cc UNKNOWN
src/base/range_map.hh UNKNOWN
src/base/stl_helpers.hh UNKNOWN
src/cpu/o3/decode_impl.hh UNKNOWN
src/cpu/o3/iew.hh UNKNOWN
src/cpu/o3/inst_queue.hh UNKNOWN
src/cpu/o3/inst_queue_impl.hh UNKNOWN
src/cpu/o3/mem_dep_unit.cc UNKNOWN
src/cpu/o3/sat_counter.hh UNKNOWN
src/dev/alpha/tsunami_cchip.cc UNKNOWN
src/dev/alpha/tsunami_io.cc UNKNOWN
src/dev/arm/pl111.hh UNKNOWN
src/dev/arm/pl111.cc UNKNOWN
src/dev/copy_engine.cc UNKNOWN
src/dev/ide_ctrl.cc UNKNOWN
src/dev/ns_gige.cc UNKNOWN
src/dev/pciconfigall.cc UNKNOWN
src/dev/pcidev.cc UNKNOWN
src/mem/cache/base.hh UNKNOWN
Diff: http://reviews.m5sim.org/r/986/diff
Testing
-------
Thanks,
Koan-Sin
Andreas Hansson
2012-01-13 09:42:21 UTC
Permalink
Post by Koan-Sin Tan
src/dev/copy_engine.cc, line 48
<http://reviews.m5sim.org/r/986/diff/2/?file=20774#file20774line48>
Why does the std cause a problem with the packet->set? Packet does not inherit from any STL container class. I don't get why there is any potential overloading.
this kind of ambiguity has nothing to do with inheritance as far as I can tell
Obviously clang thinks there is more than one "set" member function on a Packet, and I do not really see why the STL container set (which I thought was the one causing the problem) could be part of the picture.

In short, why is there any ambiguity if a packet only has one set member function?


- Andreas


-----------------------------------------------------------
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-----------------------------------------------------------
Post by Koan-Sin Tan
-----------------------------------------------------------
http://reviews.m5sim.org/r/986/
-----------------------------------------------------------
(Updated 2012-01-12 23:36:49)
Review request for Default.
Summary
-------
Initial patch to make gem5 compile with clang/llvm. Tested on Mac OS X 10.7.2 + clang/llvm from Xcode 4.2
Diffs
-----
SConstruct UNKNOWN
src/SConscript UNKNOWN
src/arch/alpha/tlb.cc UNKNOWN
src/arch/arm/insts/static_inst.hh UNKNOWN
src/arch/arm/insts/vfp.hh UNKNOWN
src/arch/arm/isa/templates/basic.isa UNKNOWN
src/arch/generic/memhelpers.hh UNKNOWN
src/arch/mips/faults.hh UNKNOWN
src/arch/mips/faults.cc UNKNOWN
src/arch/x86/bios/intelmp.cc UNKNOWN
src/base/fast_alloc.cc UNKNOWN
src/base/range_map.hh UNKNOWN
src/base/stl_helpers.hh UNKNOWN
src/cpu/o3/decode_impl.hh UNKNOWN
src/cpu/o3/iew.hh UNKNOWN
src/cpu/o3/inst_queue.hh UNKNOWN
src/cpu/o3/inst_queue_impl.hh UNKNOWN
src/cpu/o3/mem_dep_unit.cc UNKNOWN
src/cpu/o3/sat_counter.hh UNKNOWN
src/dev/alpha/tsunami_cchip.cc UNKNOWN
src/dev/alpha/tsunami_io.cc UNKNOWN
src/dev/arm/pl111.hh UNKNOWN
src/dev/arm/pl111.cc UNKNOWN
src/dev/copy_engine.cc UNKNOWN
src/dev/ide_ctrl.cc UNKNOWN
src/dev/ns_gige.cc UNKNOWN
src/dev/pciconfigall.cc UNKNOWN
src/dev/pcidev.cc UNKNOWN
src/mem/cache/base.hh UNKNOWN
src/sim/process_impl.hh UNKNOWN
src/sim/syscall_emul.hh UNKNOWN
Diff: http://reviews.m5sim.org/r/986/diff
Testing
-------
Thanks,
Koan-Sin
Koan-Sin Tan
2012-01-13 07:36:49 UTC
Permalink
-----------------------------------------------------------
This is an automatically generated e-mail. To reply, visit:
http://reviews.m5sim.org/r/986/
-----------------------------------------------------------

(Updated 2012-01-12 23:36:49.582858)


Review request for Default.


Changes
-------

1. use TheISA:: instead of introducing 'using namespace' in headers, as suggested by Nathan
2. check sizeof(guestVal) before doing "guestVal >>= 8", as suggested by Andreas


Summary
-------

Initial patch to make gem5 compile with clang/llvm. Tested on Mac OS X 10.7.2 + clang/llvm from Xcode 4.2


Diffs (updated)
-----

SConstruct UNKNOWN
src/SConscript UNKNOWN
src/arch/alpha/tlb.cc UNKNOWN
src/arch/arm/insts/static_inst.hh UNKNOWN
src/arch/arm/insts/vfp.hh UNKNOWN
src/arch/arm/isa/templates/basic.isa UNKNOWN
src/arch/generic/memhelpers.hh UNKNOWN
src/arch/mips/faults.hh UNKNOWN
src/arch/mips/faults.cc UNKNOWN
src/arch/x86/bios/intelmp.cc UNKNOWN
src/base/fast_alloc.cc UNKNOWN
src/base/range_map.hh UNKNOWN
src/base/stl_helpers.hh UNKNOWN
src/cpu/o3/decode_impl.hh UNKNOWN
src/cpu/o3/iew.hh UNKNOWN
src/cpu/o3/inst_queue.hh UNKNOWN
src/cpu/o3/inst_queue_impl.hh UNKNOWN
src/cpu/o3/mem_dep_unit.cc UNKNOWN
src/cpu/o3/sat_counter.hh UNKNOWN
src/dev/alpha/tsunami_cchip.cc UNKNOWN
src/dev/alpha/tsunami_io.cc UNKNOWN
src/dev/arm/pl111.hh UNKNOWN
src/dev/arm/pl111.cc UNKNOWN
src/dev/copy_engine.cc UNKNOWN
src/dev/ide_ctrl.cc UNKNOWN
src/dev/ns_gige.cc UNKNOWN
src/dev/pciconfigall.cc UNKNOWN
src/dev/pcidev.cc UNKNOWN
src/mem/cache/base.hh UNKNOWN
src/sim/process_impl.hh UNKNOWN
src/sim/syscall_emul.hh UNKNOWN

Diff: http://reviews.m5sim.org/r/986/diff


Testing
-------


Thanks,

Koan-Sin
Nathan Binkert
2012-01-17 19:00:05 UTC
Permalink
-----------------------------------------------------------
This is an automatically generated e-mail. To reply, visit:
http://reviews.m5sim.org/r/986/#review1956
-----------------------------------------------------------


Overall, this looks a lot better. The only thing I really want an answer on is why you got rid fo the "using namespace std" in those .cc files. Other than that, this is basically ready.


SConstruct
<http://reviews.m5sim.org/r/986/#comment2462>

I'm happy to have you fix the struct/class stuff and get rid of -Wno-mismatched-tags



src/arch/arm/isa/templates/basic.isa
<http://reviews.m5sim.org/r/986/#comment2459>

Don't need the comment here.



src/dev/ide_ctrl.cc
<http://reviews.m5sim.org/r/986/#comment2460>

This should be ok (it's in a .cc file). What's wrong?



src/dev/ns_gige.cc
<http://reviews.m5sim.org/r/986/#comment2461>

Same here



- Nathan
Post by Nathan Binkert
-----------------------------------------------------------
http://reviews.m5sim.org/r/986/
-----------------------------------------------------------
(Updated 2012-01-12 23:36:49)
Review request for Default.
Summary
-------
Initial patch to make gem5 compile with clang/llvm. Tested on Mac OS X 10.7.2 + clang/llvm from Xcode 4.2
Diffs
-----
SConstruct UNKNOWN
src/SConscript UNKNOWN
src/arch/alpha/tlb.cc UNKNOWN
src/arch/arm/insts/static_inst.hh UNKNOWN
src/arch/arm/insts/vfp.hh UNKNOWN
src/arch/arm/isa/templates/basic.isa UNKNOWN
src/arch/generic/memhelpers.hh UNKNOWN
src/arch/mips/faults.hh UNKNOWN
src/arch/mips/faults.cc UNKNOWN
src/arch/x86/bios/intelmp.cc UNKNOWN
src/base/fast_alloc.cc UNKNOWN
src/base/range_map.hh UNKNOWN
src/base/stl_helpers.hh UNKNOWN
src/cpu/o3/decode_impl.hh UNKNOWN
src/cpu/o3/iew.hh UNKNOWN
src/cpu/o3/inst_queue.hh UNKNOWN
src/cpu/o3/inst_queue_impl.hh UNKNOWN
src/cpu/o3/mem_dep_unit.cc UNKNOWN
src/cpu/o3/sat_counter.hh UNKNOWN
src/dev/alpha/tsunami_cchip.cc UNKNOWN
src/dev/alpha/tsunami_io.cc UNKNOWN
src/dev/arm/pl111.hh UNKNOWN
src/dev/arm/pl111.cc UNKNOWN
src/dev/copy_engine.cc UNKNOWN
src/dev/ide_ctrl.cc UNKNOWN
src/dev/ns_gige.cc UNKNOWN
src/dev/pciconfigall.cc UNKNOWN
src/dev/pcidev.cc UNKNOWN
src/mem/cache/base.hh UNKNOWN
src/sim/process_impl.hh UNKNOWN
src/sim/syscall_emul.hh UNKNOWN
Diff: http://reviews.m5sim.org/r/986/diff
Testing
-------
Thanks,
Koan-Sin
Ali Saidi
2012-01-19 05:52:06 UTC
Permalink
Post by Nathan Binkert
src/dev/ide_ctrl.cc, line 45
<http://reviews.m5sim.org/r/986/diff/3/?file=20975#file20975line45>
This should be ok (it's in a .cc file). What's wrong?
It's the std::set vs Packet::set issue.

It looks like a clang bug... http://llvm.org/bugs/show_bug.cgi?id=7247

Ali


- Ali


-----------------------------------------------------------
This is an automatically generated e-mail. To reply, visit:
http://reviews.m5sim.org/r/986/#review1956
-----------------------------------------------------------
Post by Nathan Binkert
-----------------------------------------------------------
http://reviews.m5sim.org/r/986/
-----------------------------------------------------------
(Updated 2012-01-12 23:36:49)
Review request for Default.
Summary
-------
Initial patch to make gem5 compile with clang/llvm. Tested on Mac OS X 10.7.2 + clang/llvm from Xcode 4.2
Diffs
-----
SConstruct UNKNOWN
src/SConscript UNKNOWN
src/arch/alpha/tlb.cc UNKNOWN
src/arch/arm/insts/static_inst.hh UNKNOWN
src/arch/arm/insts/vfp.hh UNKNOWN
src/arch/arm/isa/templates/basic.isa UNKNOWN
src/arch/generic/memhelpers.hh UNKNOWN
src/arch/mips/faults.hh UNKNOWN
src/arch/mips/faults.cc UNKNOWN
src/arch/x86/bios/intelmp.cc UNKNOWN
src/base/fast_alloc.cc UNKNOWN
src/base/range_map.hh UNKNOWN
src/base/stl_helpers.hh UNKNOWN
src/cpu/o3/decode_impl.hh UNKNOWN
src/cpu/o3/iew.hh UNKNOWN
src/cpu/o3/inst_queue.hh UNKNOWN
src/cpu/o3/inst_queue_impl.hh UNKNOWN
src/cpu/o3/mem_dep_unit.cc UNKNOWN
src/cpu/o3/sat_counter.hh UNKNOWN
src/dev/alpha/tsunami_cchip.cc UNKNOWN
src/dev/alpha/tsunami_io.cc UNKNOWN
src/dev/arm/pl111.hh UNKNOWN
src/dev/arm/pl111.cc UNKNOWN
src/dev/copy_engine.cc UNKNOWN
src/dev/ide_ctrl.cc UNKNOWN
src/dev/ns_gige.cc UNKNOWN
src/dev/pciconfigall.cc UNKNOWN
src/dev/pcidev.cc UNKNOWN
src/mem/cache/base.hh UNKNOWN
src/sim/process_impl.hh UNKNOWN
src/sim/syscall_emul.hh UNKNOWN
Diff: http://reviews.m5sim.org/r/986/diff
Testing
-------
Thanks,
Koan-Sin
Gabe Black
2012-01-19 06:27:45 UTC
Permalink
Post by Ali Saidi
src/dev/ide_ctrl.cc, line 45
<http://reviews.m5sim.org/r/986/diff/3/?file=20975#file20975line45>
This should be ok (it's in a .cc file). What's wrong?
It's the std::set vs Packet::set issue.
It looks like a clang bug... http://llvm.org/bugs/show_bug.cgi?id=7247
Ali
What about adding "using std::set;"? Or is it "using namespace std::set"? One of those might lead clang to the right answer without adding std:: all over.


- Gabe


-----------------------------------------------------------
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http://reviews.m5sim.org/r/986/#review1956
-----------------------------------------------------------
Post by Ali Saidi
-----------------------------------------------------------
http://reviews.m5sim.org/r/986/
-----------------------------------------------------------
(Updated 2012-01-12 23:36:49)
Review request for Default.
Summary
-------
Initial patch to make gem5 compile with clang/llvm. Tested on Mac OS X 10.7.2 + clang/llvm from Xcode 4.2
Diffs
-----
SConstruct UNKNOWN
src/SConscript UNKNOWN
src/arch/alpha/tlb.cc UNKNOWN
src/arch/arm/insts/static_inst.hh UNKNOWN
src/arch/arm/insts/vfp.hh UNKNOWN
src/arch/arm/isa/templates/basic.isa UNKNOWN
src/arch/generic/memhelpers.hh UNKNOWN
src/arch/mips/faults.hh UNKNOWN
src/arch/mips/faults.cc UNKNOWN
src/arch/x86/bios/intelmp.cc UNKNOWN
src/base/fast_alloc.cc UNKNOWN
src/base/range_map.hh UNKNOWN
src/base/stl_helpers.hh UNKNOWN
src/cpu/o3/decode_impl.hh UNKNOWN
src/cpu/o3/iew.hh UNKNOWN
src/cpu/o3/inst_queue.hh UNKNOWN
src/cpu/o3/inst_queue_impl.hh UNKNOWN
src/cpu/o3/mem_dep_unit.cc UNKNOWN
src/cpu/o3/sat_counter.hh UNKNOWN
src/dev/alpha/tsunami_cchip.cc UNKNOWN
src/dev/alpha/tsunami_io.cc UNKNOWN
src/dev/arm/pl111.hh UNKNOWN
src/dev/arm/pl111.cc UNKNOWN
src/dev/copy_engine.cc UNKNOWN
src/dev/ide_ctrl.cc UNKNOWN
src/dev/ns_gige.cc UNKNOWN
src/dev/pciconfigall.cc UNKNOWN
src/dev/pcidev.cc UNKNOWN
src/mem/cache/base.hh UNKNOWN
src/sim/process_impl.hh UNKNOWN
src/sim/syscall_emul.hh UNKNOWN
Diff: http://reviews.m5sim.org/r/986/diff
Testing
-------
Thanks,
Koan-Sin
Andreas Hansson
2012-01-19 09:37:21 UTC
Permalink
Post by Ali Saidi
src/dev/ide_ctrl.cc, line 45
<http://reviews.m5sim.org/r/986/diff/3/?file=20975#file20975line45>
This should be ok (it's in a .cc file). What's wrong?
It's the std::set vs Packet::set issue.
It looks like a clang bug... http://llvm.org/bugs/show_bug.cgi?id=7247
Ali
What about adding "using std::set;"? Or is it "using namespace std::set"? One of those might lead clang to the right answer without adding std:: all over.
Indeed, instead of the "using namespace std", we could add the appropriate "using std::list", "using std::vector" etc. From the clang bug description it looks like it should be resolved?


- Andreas


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-----------------------------------------------------------
Post by Ali Saidi
-----------------------------------------------------------
http://reviews.m5sim.org/r/986/
-----------------------------------------------------------
(Updated 2012-01-12 23:36:49)
Review request for Default.
Summary
-------
Initial patch to make gem5 compile with clang/llvm. Tested on Mac OS X 10.7.2 + clang/llvm from Xcode 4.2
Diffs
-----
SConstruct UNKNOWN
src/SConscript UNKNOWN
src/arch/alpha/tlb.cc UNKNOWN
src/arch/arm/insts/static_inst.hh UNKNOWN
src/arch/arm/insts/vfp.hh UNKNOWN
src/arch/arm/isa/templates/basic.isa UNKNOWN
src/arch/generic/memhelpers.hh UNKNOWN
src/arch/mips/faults.hh UNKNOWN
src/arch/mips/faults.cc UNKNOWN
src/arch/x86/bios/intelmp.cc UNKNOWN
src/base/fast_alloc.cc UNKNOWN
src/base/range_map.hh UNKNOWN
src/base/stl_helpers.hh UNKNOWN
src/cpu/o3/decode_impl.hh UNKNOWN
src/cpu/o3/iew.hh UNKNOWN
src/cpu/o3/inst_queue.hh UNKNOWN
src/cpu/o3/inst_queue_impl.hh UNKNOWN
src/cpu/o3/mem_dep_unit.cc UNKNOWN
src/cpu/o3/sat_counter.hh UNKNOWN
src/dev/alpha/tsunami_cchip.cc UNKNOWN
src/dev/alpha/tsunami_io.cc UNKNOWN
src/dev/arm/pl111.hh UNKNOWN
src/dev/arm/pl111.cc UNKNOWN
src/dev/copy_engine.cc UNKNOWN
src/dev/ide_ctrl.cc UNKNOWN
src/dev/ns_gige.cc UNKNOWN
src/dev/pciconfigall.cc UNKNOWN
src/dev/pcidev.cc UNKNOWN
src/mem/cache/base.hh UNKNOWN
src/sim/process_impl.hh UNKNOWN
src/sim/syscall_emul.hh UNKNOWN
Diff: http://reviews.m5sim.org/r/986/diff
Testing
-------
Thanks,
Koan-Sin
Nathan Binkert
2012-01-19 15:46:03 UTC
Permalink
Post by Ali Saidi
src/dev/ide_ctrl.cc, line 45
<http://reviews.m5sim.org/r/986/diff/3/?file=20975#file20975line45>
This should be ok (it's in a .cc file). What's wrong?
It's the std::set vs Packet::set issue.
It looks like a clang bug... http://llvm.org/bugs/show_bug.cgi?id=7247
Ali
What about adding "using std::set;"? Or is it "using namespace std::set"? One of those might lead clang to the right answer without adding std:: all over.
Indeed, instead of the "using namespace std", we could add the appropriate "using std::list", "using std::vector" etc. From the clang bug description it looks like it should be resolved?
I think that we're approaching the realm of having talked about this patch way too much, but I like the idea of the using namespace std::list, etc. instead of sprinkling std:: all over. Mainly because the latter might get undone and break clang, but with the former, we can put in a comment.

Either way, I think that we should have a comment like this up where the using namespace should be.

// Clang doesn't deal with the existence of std::set and Packet::set properly, so we
// can't do this:
// using namespace std;


- Nathan


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-----------------------------------------------------------
Post by Ali Saidi
-----------------------------------------------------------
http://reviews.m5sim.org/r/986/
-----------------------------------------------------------
(Updated 2012-01-12 23:36:49)
Review request for Default.
Summary
-------
Initial patch to make gem5 compile with clang/llvm. Tested on Mac OS X 10.7.2 + clang/llvm from Xcode 4.2
Diffs
-----
SConstruct UNKNOWN
src/SConscript UNKNOWN
src/arch/alpha/tlb.cc UNKNOWN
src/arch/arm/insts/static_inst.hh UNKNOWN
src/arch/arm/insts/vfp.hh UNKNOWN
src/arch/arm/isa/templates/basic.isa UNKNOWN
src/arch/generic/memhelpers.hh UNKNOWN
src/arch/mips/faults.hh UNKNOWN
src/arch/mips/faults.cc UNKNOWN
src/arch/x86/bios/intelmp.cc UNKNOWN
src/base/fast_alloc.cc UNKNOWN
src/base/range_map.hh UNKNOWN
src/base/stl_helpers.hh UNKNOWN
src/cpu/o3/decode_impl.hh UNKNOWN
src/cpu/o3/iew.hh UNKNOWN
src/cpu/o3/inst_queue.hh UNKNOWN
src/cpu/o3/inst_queue_impl.hh UNKNOWN
src/cpu/o3/mem_dep_unit.cc UNKNOWN
src/cpu/o3/sat_counter.hh UNKNOWN
src/dev/alpha/tsunami_cchip.cc UNKNOWN
src/dev/alpha/tsunami_io.cc UNKNOWN
src/dev/arm/pl111.hh UNKNOWN
src/dev/arm/pl111.cc UNKNOWN
src/dev/copy_engine.cc UNKNOWN
src/dev/ide_ctrl.cc UNKNOWN
src/dev/ns_gige.cc UNKNOWN
src/dev/pciconfigall.cc UNKNOWN
src/dev/pcidev.cc UNKNOWN
src/mem/cache/base.hh UNKNOWN
src/sim/process_impl.hh UNKNOWN
src/sim/syscall_emul.hh UNKNOWN
Diff: http://reviews.m5sim.org/r/986/diff
Testing
-------
Thanks,
Koan-Sin
Gabe Black
2012-01-18 10:56:36 UTC
Permalink
-----------------------------------------------------------
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-----------------------------------------------------------



src/arch/x86/bios/intelmp.cc
<http://reviews.m5sim.org/r/986/#comment2463>

Just change T to uint64_t and you won't need the if (sizeof(...


- Gabe
Post by Nathan Binkert
-----------------------------------------------------------
http://reviews.m5sim.org/r/986/
-----------------------------------------------------------
(Updated 2012-01-12 23:36:49)
Review request for Default.
Summary
-------
Initial patch to make gem5 compile with clang/llvm. Tested on Mac OS X 10.7.2 + clang/llvm from Xcode 4.2
Diffs
-----
SConstruct UNKNOWN
src/SConscript UNKNOWN
src/arch/alpha/tlb.cc UNKNOWN
src/arch/arm/insts/static_inst.hh UNKNOWN
src/arch/arm/insts/vfp.hh UNKNOWN
src/arch/arm/isa/templates/basic.isa UNKNOWN
src/arch/generic/memhelpers.hh UNKNOWN
src/arch/mips/faults.hh UNKNOWN
src/arch/mips/faults.cc UNKNOWN
src/arch/x86/bios/intelmp.cc UNKNOWN
src/base/fast_alloc.cc UNKNOWN
src/base/range_map.hh UNKNOWN
src/base/stl_helpers.hh UNKNOWN
src/cpu/o3/decode_impl.hh UNKNOWN
src/cpu/o3/iew.hh UNKNOWN
src/cpu/o3/inst_queue.hh UNKNOWN
src/cpu/o3/inst_queue_impl.hh UNKNOWN
src/cpu/o3/mem_dep_unit.cc UNKNOWN
src/cpu/o3/sat_counter.hh UNKNOWN
src/dev/alpha/tsunami_cchip.cc UNKNOWN
src/dev/alpha/tsunami_io.cc UNKNOWN
src/dev/arm/pl111.hh UNKNOWN
src/dev/arm/pl111.cc UNKNOWN
src/dev/copy_engine.cc UNKNOWN
src/dev/ide_ctrl.cc UNKNOWN
src/dev/ns_gige.cc UNKNOWN
src/dev/pciconfigall.cc UNKNOWN
src/dev/pcidev.cc UNKNOWN
src/mem/cache/base.hh UNKNOWN
src/sim/process_impl.hh UNKNOWN
src/sim/syscall_emul.hh UNKNOWN
Diff: http://reviews.m5sim.org/r/986/diff
Testing
-------
Thanks,
Koan-Sin
Andreas Hansson
2012-01-19 10:45:56 UTC
Permalink
-----------------------------------------------------------
This is an automatically generated e-mail. To reply, visit:
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-----------------------------------------------------------



SConstruct
<http://reviews.m5sim.org/r/986/#comment2471>

I would imagine we should also add "+ main[CLANG]" in this test.



SConstruct
<http://reviews.m5sim.org/r/986/#comment2472>

The CheckHeader test fails when I try to build using clang, and the reason seems to be that clang in contrast to gcc cannot find asm/errno.h that is included via Python.h. On a x86_64 machine I had to forcefully add "-I/usr/include/x64_64-linux-gnu" for the build to proceed. Did anyone else have these issues?


- Andreas
Post by Nathan Binkert
-----------------------------------------------------------
http://reviews.m5sim.org/r/986/
-----------------------------------------------------------
(Updated 2012-01-12 23:36:49)
Review request for Default.
Summary
-------
Initial patch to make gem5 compile with clang/llvm. Tested on Mac OS X 10.7.2 + clang/llvm from Xcode 4.2
Diffs
-----
SConstruct UNKNOWN
src/SConscript UNKNOWN
src/arch/alpha/tlb.cc UNKNOWN
src/arch/arm/insts/static_inst.hh UNKNOWN
src/arch/arm/insts/vfp.hh UNKNOWN
src/arch/arm/isa/templates/basic.isa UNKNOWN
src/arch/generic/memhelpers.hh UNKNOWN
src/arch/mips/faults.hh UNKNOWN
src/arch/mips/faults.cc UNKNOWN
src/arch/x86/bios/intelmp.cc UNKNOWN
src/base/fast_alloc.cc UNKNOWN
src/base/range_map.hh UNKNOWN
src/base/stl_helpers.hh UNKNOWN
src/cpu/o3/decode_impl.hh UNKNOWN
src/cpu/o3/iew.hh UNKNOWN
src/cpu/o3/inst_queue.hh UNKNOWN
src/cpu/o3/inst_queue_impl.hh UNKNOWN
src/cpu/o3/mem_dep_unit.cc UNKNOWN
src/cpu/o3/sat_counter.hh UNKNOWN
src/dev/alpha/tsunami_cchip.cc UNKNOWN
src/dev/alpha/tsunami_io.cc UNKNOWN
src/dev/arm/pl111.hh UNKNOWN
src/dev/arm/pl111.cc UNKNOWN
src/dev/copy_engine.cc UNKNOWN
src/dev/ide_ctrl.cc UNKNOWN
src/dev/ns_gige.cc UNKNOWN
src/dev/pciconfigall.cc UNKNOWN
src/dev/pcidev.cc UNKNOWN
src/mem/cache/base.hh UNKNOWN
src/sim/process_impl.hh UNKNOWN
src/sim/syscall_emul.hh UNKNOWN
Diff: http://reviews.m5sim.org/r/986/diff
Testing
-------
Thanks,
Koan-Sin
Koan-Sin Tan
2012-01-19 11:48:33 UTC
Permalink
Post by Nathan Binkert
SConstruct, line 477
<http://reviews.m5sim.org/r/986/diff/3/?file=20951#file20951line477>
I would imagine we should also add "+ main[CLANG]" in this test.
sounds right
Post by Nathan Binkert
SConstruct, line 693
<http://reviews.m5sim.org/r/986/diff/3/?file=20951#file20951line693>
The CheckHeader test fails when I try to build using clang, and the reason seems to be that clang in contrast to gcc cannot find asm/errno.h that is included via Python.h. On a x86_64 machine I had to forcefully add "-I/usr/include/x64_64-linux-gnu" for the build to proceed. Did anyone else have these issues?
this is a bit tricky. Simple answer is to try something like 'scons build/ARM_SE/m5.opt CXX=clang++ CC=clang". If this works, I know the reason :-)


- Koan-Sin


-----------------------------------------------------------
This is an automatically generated e-mail. To reply, visit:
http://reviews.m5sim.org/r/986/#review1967
-----------------------------------------------------------
Post by Nathan Binkert
-----------------------------------------------------------
http://reviews.m5sim.org/r/986/
-----------------------------------------------------------
(Updated 2012-01-12 23:36:49)
Review request for Default.
Summary
-------
Initial patch to make gem5 compile with clang/llvm. Tested on Mac OS X 10.7.2 + clang/llvm from Xcode 4.2
Diffs
-----
SConstruct UNKNOWN
src/SConscript UNKNOWN
src/arch/alpha/tlb.cc UNKNOWN
src/arch/arm/insts/static_inst.hh UNKNOWN
src/arch/arm/insts/vfp.hh UNKNOWN
src/arch/arm/isa/templates/basic.isa UNKNOWN
src/arch/generic/memhelpers.hh UNKNOWN
src/arch/mips/faults.hh UNKNOWN
src/arch/mips/faults.cc UNKNOWN
src/arch/x86/bios/intelmp.cc UNKNOWN
src/base/fast_alloc.cc UNKNOWN
src/base/range_map.hh UNKNOWN
src/base/stl_helpers.hh UNKNOWN
src/cpu/o3/decode_impl.hh UNKNOWN
src/cpu/o3/iew.hh UNKNOWN
src/cpu/o3/inst_queue.hh UNKNOWN
src/cpu/o3/inst_queue_impl.hh UNKNOWN
src/cpu/o3/mem_dep_unit.cc UNKNOWN
src/cpu/o3/sat_counter.hh UNKNOWN
src/dev/alpha/tsunami_cchip.cc UNKNOWN
src/dev/alpha/tsunami_io.cc UNKNOWN
src/dev/arm/pl111.hh UNKNOWN
src/dev/arm/pl111.cc UNKNOWN
src/dev/copy_engine.cc UNKNOWN
src/dev/ide_ctrl.cc UNKNOWN
src/dev/ns_gige.cc UNKNOWN
src/dev/pciconfigall.cc UNKNOWN
src/dev/pcidev.cc UNKNOWN
src/mem/cache/base.hh UNKNOWN
src/sim/process_impl.hh UNKNOWN
src/sim/syscall_emul.hh UNKNOWN
Diff: http://reviews.m5sim.org/r/986/diff
Testing
-------
Thanks,
Koan-Sin
Andreas Hansson
2012-01-19 11:53:27 UTC
Permalink
Post by Koan-Sin Tan
SConstruct, line 693
<http://reviews.m5sim.org/r/986/diff/3/?file=20951#file20951line693>
The CheckHeader test fails when I try to build using clang, and the reason seems to be that clang in contrast to gcc cannot find asm/errno.h that is included via Python.h. On a x86_64 machine I had to forcefully add "-I/usr/include/x64_64-linux-gnu" for the build to proceed. Did anyone else have these issues?
this is a bit tricky. Simple answer is to try something like 'scons build/ARM_SE/m5.opt CXX=clang++ CC=clang". If this works, I know the reason :-)
tried both export CC=clang; export CXX=clang++ and specifying on the command line as suggested...but no luck.
Post by Koan-Sin Tan
"asm/errno.h" is in the directory /usr/include/<host triple>. gcc has that directory on its search list, but clang doesn't
- Andreas


-----------------------------------------------------------
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http://reviews.m5sim.org/r/986/#review1967
-----------------------------------------------------------
Post by Koan-Sin Tan
-----------------------------------------------------------
http://reviews.m5sim.org/r/986/
-----------------------------------------------------------
(Updated 2012-01-12 23:36:49)
Review request for Default.
Summary
-------
Initial patch to make gem5 compile with clang/llvm. Tested on Mac OS X 10.7.2 + clang/llvm from Xcode 4.2
Diffs
-----
SConstruct UNKNOWN
src/SConscript UNKNOWN
src/arch/alpha/tlb.cc UNKNOWN
src/arch/arm/insts/static_inst.hh UNKNOWN
src/arch/arm/insts/vfp.hh UNKNOWN
src/arch/arm/isa/templates/basic.isa UNKNOWN
src/arch/generic/memhelpers.hh UNKNOWN
src/arch/mips/faults.hh UNKNOWN
src/arch/mips/faults.cc UNKNOWN
src/arch/x86/bios/intelmp.cc UNKNOWN
src/base/fast_alloc.cc UNKNOWN
src/base/range_map.hh UNKNOWN
src/base/stl_helpers.hh UNKNOWN
src/cpu/o3/decode_impl.hh UNKNOWN
src/cpu/o3/iew.hh UNKNOWN
src/cpu/o3/inst_queue.hh UNKNOWN
src/cpu/o3/inst_queue_impl.hh UNKNOWN
src/cpu/o3/mem_dep_unit.cc UNKNOWN
src/cpu/o3/sat_counter.hh UNKNOWN
src/dev/alpha/tsunami_cchip.cc UNKNOWN
src/dev/alpha/tsunami_io.cc UNKNOWN
src/dev/arm/pl111.hh UNKNOWN
src/dev/arm/pl111.cc UNKNOWN
src/dev/copy_engine.cc UNKNOWN
src/dev/ide_ctrl.cc UNKNOWN
src/dev/ns_gige.cc UNKNOWN
src/dev/pciconfigall.cc UNKNOWN
src/dev/pcidev.cc UNKNOWN
src/mem/cache/base.hh UNKNOWN
src/sim/process_impl.hh UNKNOWN
src/sim/syscall_emul.hh UNKNOWN
Diff: http://reviews.m5sim.org/r/986/diff
Testing
-------
Thanks,
Koan-Sin
Koan-Sin Tan
2012-01-19 12:06:40 UTC
Permalink
Post by Koan-Sin Tan
SConstruct, line 693
<http://reviews.m5sim.org/r/986/diff/3/?file=20951#file20951line693>
The CheckHeader test fails when I try to build using clang, and the reason seems to be that clang in contrast to gcc cannot find asm/errno.h that is included via Python.h. On a x86_64 machine I had to forcefully add "-I/usr/include/x64_64-linux-gnu" for the build to proceed. Did anyone else have these issues?
this is a bit tricky. Simple answer is to try something like 'scons build/ARM_SE/m5.opt CXX=clang++ CC=clang". If this works, I know the reason :-)
tried both export CC=clang; export CXX=clang++ and specifying on the command line as suggested...but no luck.
"asm/errno.h" is in the directory /usr/include/<host triple>. gcc has that directory on its search list, but clang doesn't
It looks like it's a configuration problem of your clang. Clang can find asm/error.h (located at /usr/include/arml-linux-gnueabi/) on my Pandaboard running ubuntu 11.10


- Koan-Sin


-----------------------------------------------------------
This is an automatically generated e-mail. To reply, visit:
http://reviews.m5sim.org/r/986/#review1967
-----------------------------------------------------------
Post by Koan-Sin Tan
-----------------------------------------------------------
http://reviews.m5sim.org/r/986/
-----------------------------------------------------------
(Updated 2012-01-12 23:36:49)
Review request for Default.
Summary
-------
Initial patch to make gem5 compile with clang/llvm. Tested on Mac OS X 10.7.2 + clang/llvm from Xcode 4.2
Diffs
-----
SConstruct UNKNOWN
src/SConscript UNKNOWN
src/arch/alpha/tlb.cc UNKNOWN
src/arch/arm/insts/static_inst.hh UNKNOWN
src/arch/arm/insts/vfp.hh UNKNOWN
src/arch/arm/isa/templates/basic.isa UNKNOWN
src/arch/generic/memhelpers.hh UNKNOWN
src/arch/mips/faults.hh UNKNOWN
src/arch/mips/faults.cc UNKNOWN
src/arch/x86/bios/intelmp.cc UNKNOWN
src/base/fast_alloc.cc UNKNOWN
src/base/range_map.hh UNKNOWN
src/base/stl_helpers.hh UNKNOWN
src/cpu/o3/decode_impl.hh UNKNOWN
src/cpu/o3/iew.hh UNKNOWN
src/cpu/o3/inst_queue.hh UNKNOWN
src/cpu/o3/inst_queue_impl.hh UNKNOWN
src/cpu/o3/mem_dep_unit.cc UNKNOWN
src/cpu/o3/sat_counter.hh UNKNOWN
src/dev/alpha/tsunami_cchip.cc UNKNOWN
src/dev/alpha/tsunami_io.cc UNKNOWN
src/dev/arm/pl111.hh UNKNOWN
src/dev/arm/pl111.cc UNKNOWN
src/dev/copy_engine.cc UNKNOWN
src/dev/ide_ctrl.cc UNKNOWN
src/dev/ns_gige.cc UNKNOWN
src/dev/pciconfigall.cc UNKNOWN
src/dev/pcidev.cc UNKNOWN
src/mem/cache/base.hh UNKNOWN
src/sim/process_impl.hh UNKNOWN
src/sim/syscall_emul.hh UNKNOWN
Diff: http://reviews.m5sim.org/r/986/diff
Testing
-------
Thanks,
Koan-Sin
Ali Saidi
2012-01-21 19:19:49 UTC
Permalink
Post by Koan-Sin Tan
SConstruct, line 693
<http://reviews.gem5.org/r/986/diff/3/?file=20951#file20951line693>
The CheckHeader test fails when I try to build using clang, and the reason seems to be that clang in contrast to gcc cannot find asm/errno.h that is included via Python.h. On a x86_64 machine I had to forcefully add "-I/usr/include/x64_64-linux-gnu" for the build to proceed. Did anyone else have these issues?
this is a bit tricky. Simple answer is to try something like 'scons build/ARM_SE/m5.opt CXX=clang++ CC=clang". If this works, I know the reason :-)
tried both export CC=clang; export CXX=clang++ and specifying on the command line as suggested...but no luck.
"asm/errno.h" is in the directory /usr/include/<host triple>. gcc has that directory on its search list, but clang doesn't
It looks like it's a configuration problem of your clang. Clang can find asm/error.h (located at /usr/include/arml-linux-gnueabi/) on my Pandaboard running ubuntu 11.10
It's some combination of an ubuntu problem (not creating a a symlink for /usr/include/asm) and clang, not understanding you might want to compile for multiple architectures, so having the architecture independent stuff in another directory is better. With ubuntu you can get around the problem by installing gcc-multilib or symlinking usr/include/asm


- Ali


-----------------------------------------------------------
This is an automatically generated e-mail. To reply, visit:
http://reviews.gem5.org/r/986/#review1967
-----------------------------------------------------------
Post by Koan-Sin Tan
-----------------------------------------------------------
http://reviews.gem5.org/r/986/
-----------------------------------------------------------
(Updated Jan. 12, 2012, 11:36 p.m.)
Review request for Default.
Description
-------
Initial patch to make gem5 compile with clang/llvm. Tested on Mac OS X 10.7.2 + clang/llvm from Xcode 4.2
Diffs
-----
SConstruct UNKNOWN
src/SConscript UNKNOWN
src/arch/alpha/tlb.cc UNKNOWN
src/arch/arm/insts/static_inst.hh UNKNOWN
src/arch/arm/insts/vfp.hh UNKNOWN
src/arch/arm/isa/templates/basic.isa UNKNOWN
src/arch/generic/memhelpers.hh UNKNOWN
src/arch/mips/faults.hh UNKNOWN
src/arch/mips/faults.cc UNKNOWN
src/arch/x86/bios/intelmp.cc UNKNOWN
src/base/fast_alloc.cc UNKNOWN
src/base/range_map.hh UNKNOWN
src/base/stl_helpers.hh UNKNOWN
src/cpu/o3/decode_impl.hh UNKNOWN
src/cpu/o3/iew.hh UNKNOWN
src/cpu/o3/inst_queue.hh UNKNOWN
src/cpu/o3/inst_queue_impl.hh UNKNOWN
src/cpu/o3/mem_dep_unit.cc UNKNOWN
src/cpu/o3/sat_counter.hh UNKNOWN
src/dev/alpha/tsunami_cchip.cc UNKNOWN
src/dev/alpha/tsunami_io.cc UNKNOWN
src/dev/arm/pl111.hh UNKNOWN
src/dev/arm/pl111.cc UNKNOWN
src/dev/copy_engine.cc UNKNOWN
src/dev/ide_ctrl.cc UNKNOWN
src/dev/ns_gige.cc UNKNOWN
src/dev/pciconfigall.cc UNKNOWN
src/dev/pcidev.cc UNKNOWN
src/mem/cache/base.hh UNKNOWN
src/sim/process_impl.hh UNKNOWN
src/sim/syscall_emul.hh UNKNOWN
Diff: http://reviews.gem5.org/r/986/diff/diff
Testing
-------
Thanks,
Koan-Sin Tan
Nathan Binkert
2012-01-19 15:46:10 UTC
Permalink
-----------------------------------------------------------
This is an automatically generated e-mail. To reply, visit:
http://reviews.m5sim.org/r/986/#review1972
-----------------------------------------------------------

Ship it!


- Nathan
Post by Nathan Binkert
-----------------------------------------------------------
http://reviews.m5sim.org/r/986/
-----------------------------------------------------------
(Updated 2012-01-12 23:36:49)
Review request for Default.
Summary
-------
Initial patch to make gem5 compile with clang/llvm. Tested on Mac OS X 10.7.2 + clang/llvm from Xcode 4.2
Diffs
-----
SConstruct UNKNOWN
src/SConscript UNKNOWN
src/arch/alpha/tlb.cc UNKNOWN
src/arch/arm/insts/static_inst.hh UNKNOWN
src/arch/arm/insts/vfp.hh UNKNOWN
src/arch/arm/isa/templates/basic.isa UNKNOWN
src/arch/generic/memhelpers.hh UNKNOWN
src/arch/mips/faults.hh UNKNOWN
src/arch/mips/faults.cc UNKNOWN
src/arch/x86/bios/intelmp.cc UNKNOWN
src/base/fast_alloc.cc UNKNOWN
src/base/range_map.hh UNKNOWN
src/base/stl_helpers.hh UNKNOWN
src/cpu/o3/decode_impl.hh UNKNOWN
src/cpu/o3/iew.hh UNKNOWN
src/cpu/o3/inst_queue.hh UNKNOWN
src/cpu/o3/inst_queue_impl.hh UNKNOWN
src/cpu/o3/mem_dep_unit.cc UNKNOWN
src/cpu/o3/sat_counter.hh UNKNOWN
src/dev/alpha/tsunami_cchip.cc UNKNOWN
src/dev/alpha/tsunami_io.cc UNKNOWN
src/dev/arm/pl111.hh UNKNOWN
src/dev/arm/pl111.cc UNKNOWN
src/dev/copy_engine.cc UNKNOWN
src/dev/ide_ctrl.cc UNKNOWN
src/dev/ns_gige.cc UNKNOWN
src/dev/pciconfigall.cc UNKNOWN
src/dev/pcidev.cc UNKNOWN
src/mem/cache/base.hh UNKNOWN
src/sim/process_impl.hh UNKNOWN
src/sim/syscall_emul.hh UNKNOWN
Diff: http://reviews.m5sim.org/r/986/diff
Testing
-------
Thanks,
Koan-Sin
Ali Saidi
2012-01-21 19:20:34 UTC
Permalink
-----------------------------------------------------------
This is an automatically generated e-mail. To reply, visit:
http://reviews.gem5.org/r/986/#review1980
-----------------------------------------------------------

Ship it!


I think is this good and plan to commit it. I assume you're fine with your name being on the patch?

Thanks for all of your effort.


- Ali Saidi
Post by Nathan Binkert
-----------------------------------------------------------
http://reviews.gem5.org/r/986/
-----------------------------------------------------------
(Updated Jan. 12, 2012, 11:36 p.m.)
Review request for Default.
Description
-------
Initial patch to make gem5 compile with clang/llvm. Tested on Mac OS X 10.7.2 + clang/llvm from Xcode 4.2
Diffs
-----
SConstruct UNKNOWN
src/SConscript UNKNOWN
src/arch/alpha/tlb.cc UNKNOWN
src/arch/arm/insts/static_inst.hh UNKNOWN
src/arch/arm/insts/vfp.hh UNKNOWN
src/arch/arm/isa/templates/basic.isa UNKNOWN
src/arch/generic/memhelpers.hh UNKNOWN
src/arch/mips/faults.hh UNKNOWN
src/arch/mips/faults.cc UNKNOWN
src/arch/x86/bios/intelmp.cc UNKNOWN
src/base/fast_alloc.cc UNKNOWN
src/base/range_map.hh UNKNOWN
src/base/stl_helpers.hh UNKNOWN
src/cpu/o3/decode_impl.hh UNKNOWN
src/cpu/o3/iew.hh UNKNOWN
src/cpu/o3/inst_queue.hh UNKNOWN
src/cpu/o3/inst_queue_impl.hh UNKNOWN
src/cpu/o3/mem_dep_unit.cc UNKNOWN
src/cpu/o3/sat_counter.hh UNKNOWN
src/dev/alpha/tsunami_cchip.cc UNKNOWN
src/dev/alpha/tsunami_io.cc UNKNOWN
src/dev/arm/pl111.hh UNKNOWN
src/dev/arm/pl111.cc UNKNOWN
src/dev/copy_engine.cc UNKNOWN
src/dev/ide_ctrl.cc UNKNOWN
src/dev/ns_gige.cc UNKNOWN
src/dev/pciconfigall.cc UNKNOWN
src/dev/pcidev.cc UNKNOWN
src/mem/cache/base.hh UNKNOWN
src/sim/process_impl.hh UNKNOWN
src/sim/syscall_emul.hh UNKNOWN
Diff: http://reviews.gem5.org/r/986/diff/diff
Testing
-------
Thanks,
Koan-Sin Tan
Koan-Sin Tan
2012-01-30 06:18:13 UTC
Permalink
-----------------------------------------------------------
This is an automatically generated e-mail. To reply, visit:
http://reviews.gem5.org/r/986/
-----------------------------------------------------------

(Updated Jan. 29, 2012, 10:18 p.m.)


Review request for Default.


Changes
-------

1. Andreas Hansson provided informative description for the patch
2. remove -Wno-mismatched-tags and make class/struct consistent
3. some small changes discussed during review


Description (updated)
-------

clang: Enable compiling gem5 using clang 2.9 and 3.0

This patch adds the necessary flags to the SConstruct and SConscript
files for compiling using clang 2.9 and later (on Ubuntu et al and OSX
XCode 4.2), and also cleans up a bunch of compiler warnings found by
clang. Most of the warnings are related to hidden virtual functions,
comparisons with unsigneds >= 0, and if-statements with empty
bodies. A number of mismatches between struct and class are also
fixed. clang 2.8 is not working as it has problems with class names
that occur in multiple namespaces (e.g. Statistics in
kernel_stats.hh).

clang has a bug (http://llvm.org/bugs/show_bug.cgi?id=7247) which
causes confusion between the container std::set and the function
Packet::set, and this is currently addressed by not including the
entire namespace std, but rather selecting e.g. "using std::vector" in
the appropriate places.


Diffs (updated)
-----

SConstruct 0d5d77cfd7071145714ed24fe40890fdb2a5693b
ext/libelf/SConscript 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/SConscript 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/arch/alpha/tlb.hh 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/arch/alpha/tlb.cc 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/arch/arm/insts/static_inst.hh 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/arch/arm/insts/vfp.hh 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/arch/arm/isa/templates/basic.isa 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/arch/arm/miscregs.cc 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/arch/generic/memhelpers.hh 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/arch/mips/faults.hh 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/arch/mips/faults.cc 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/arch/x86/bios/acpi.hh 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/arch/x86/bios/intelmp.hh 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/arch/x86/bios/intelmp.cc 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/arch/x86/bios/smbios.hh 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/base/fast_alloc.cc 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/base/range_map.hh 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/base/remote_gdb.hh 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/base/stl_helpers.hh 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/cpu/base.hh 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/cpu/base.cc 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/cpu/func_unit.hh 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/cpu/inorder/cpu.hh 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/cpu/inorder/cpu.cc 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/cpu/inorder/resource.hh 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/cpu/inorder/resource.cc 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/cpu/inorder/resource_pool.hh 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/cpu/inorder/resource_pool.cc 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/cpu/inorder/resources/cache_unit.hh 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/cpu/inorder/thread_context.cc 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/cpu/nativetrace.hh 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/cpu/o3/bpred_unit.hh 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/cpu/o3/commit.hh 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/cpu/o3/cpu.hh 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/cpu/o3/cpu.cc 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/cpu/o3/decode.hh 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/cpu/o3/decode_impl.hh 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/cpu/o3/fetch.hh 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/cpu/o3/fu_pool.hh 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/cpu/o3/fu_pool.cc 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/cpu/o3/iew.hh 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/cpu/o3/iew_impl.hh 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/cpu/o3/inst_queue.hh 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/cpu/o3/inst_queue_impl.hh 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/cpu/o3/lsq.hh 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/cpu/o3/lsq_unit.hh 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/cpu/o3/mem_dep_unit.hh 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/cpu/o3/mem_dep_unit.cc 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/cpu/o3/rename.hh 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/cpu/o3/sat_counter.hh 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/cpu/quiesce_event.hh 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/cpu/sched_list.hh 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/cpu/simple/atomic.hh 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/cpu/simple/atomic.cc 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/cpu/simple/base.hh 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/cpu/simple/base.cc 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/cpu/simple/timing.hh 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/cpu/simple/timing.cc 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/cpu/static_inst.hh 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/dev/alpha/tsunami_cchip.cc 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/dev/alpha/tsunami_io.cc 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/dev/arm/pl111.hh 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/dev/arm/pl111.cc 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/dev/copy_engine.cc 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/dev/disk_image.hh 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/dev/disk_image.cc 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/dev/ide_ctrl.cc 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/dev/ns_gige.cc 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/dev/pciconfigall.cc 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/dev/pcidev.cc 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/mem/cache/base.hh 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/mem/cache/base.cc 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/mem/cache/tags/iic.cc 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/mem/cache/tags/iic_repl/gen.hh 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/mem/cache/tags/iic_repl/gen.cc 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/mem/cache/tags/iic_repl/repl.hh 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/mem/packet.hh 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/mem/ruby/system/Sequencer.hh 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/python/m5/SimObject.py 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/sim/core.hh 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/sim/process.hh 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/sim/process.cc 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/sim/process_impl.hh 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/sim/serialize.cc 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/sim/sim_object.hh 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/sim/sim_object.cc 0d5d77cfd7071145714ed24fe40890fdb2a5693b
src/sim/syscall_emul.hh 0d5d77cfd7071145714ed24fe40890fdb2a5693b

Diff: http://reviews.gem5.org/r/986/diff/diff


Testing
-------


Thanks,

Koan-Sin Tan
Koan-Sin Tan
2012-01-30 06:21:31 UTC
Permalink
-----------------------------------------------------------
This is an automatically generated e-mail. To reply, visit:
http://reviews.gem5.org/r/986/
-----------------------------------------------------------

(Updated Jan. 29, 2012, 10:21 p.m.)


Review request for Default.


Changes
-------

it seems previous diff is not clean, regenerate one


Description
-------

clang: Enable compiling gem5 using clang 2.9 and 3.0

This patch adds the necessary flags to the SConstruct and SConscript
files for compiling using clang 2.9 and later (on Ubuntu et al and OSX
XCode 4.2), and also cleans up a bunch of compiler warnings found by
clang. Most of the warnings are related to hidden virtual functions,
comparisons with unsigneds >= 0, and if-statements with empty
bodies. A number of mismatches between struct and class are also
fixed. clang 2.8 is not working as it has problems with class names
that occur in multiple namespaces (e.g. Statistics in
kernel_stats.hh).

clang has a bug (http://llvm.org/bugs/show_bug.cgi?id=7247) which
causes confusion between the container std::set and the function
Packet::set, and this is currently addressed by not including the
entire namespace std, but rather selecting e.g. "using std::vector" in
the appropriate places.


Diffs (updated)
-----

SConstruct UNKNOWN
ext/libelf/SConscript UNKNOWN
src/SConscript UNKNOWN
src/arch/alpha/tlb.hh UNKNOWN
src/arch/alpha/tlb.cc UNKNOWN
src/arch/arm/insts/static_inst.hh UNKNOWN
src/arch/arm/insts/vfp.hh UNKNOWN
src/arch/arm/isa/templates/basic.isa UNKNOWN
src/arch/arm/miscregs.cc UNKNOWN
src/arch/generic/memhelpers.hh UNKNOWN
src/arch/mips/faults.hh UNKNOWN
src/arch/mips/faults.cc UNKNOWN
src/arch/x86/bios/acpi.hh UNKNOWN
src/arch/x86/bios/intelmp.hh UNKNOWN
src/arch/x86/bios/intelmp.cc UNKNOWN
src/arch/x86/bios/smbios.hh UNKNOWN
src/base/fast_alloc.cc UNKNOWN
src/base/range_map.hh UNKNOWN
src/base/remote_gdb.hh UNKNOWN
src/base/stl_helpers.hh UNKNOWN
src/cpu/base.hh UNKNOWN
src/cpu/base.cc UNKNOWN
src/cpu/func_unit.hh UNKNOWN
src/cpu/inorder/cpu.hh UNKNOWN
src/cpu/inorder/cpu.cc UNKNOWN
src/cpu/inorder/resource.hh UNKNOWN
src/cpu/inorder/resource.cc UNKNOWN
src/cpu/inorder/resource_pool.hh UNKNOWN
src/cpu/inorder/resource_pool.cc UNKNOWN
src/cpu/inorder/resources/cache_unit.hh UNKNOWN
src/cpu/inorder/thread_context.cc UNKNOWN
src/cpu/nativetrace.hh UNKNOWN
src/cpu/o3/bpred_unit.hh UNKNOWN
src/cpu/o3/commit.hh UNKNOWN
src/cpu/o3/cpu.hh UNKNOWN
src/cpu/o3/cpu.cc UNKNOWN
src/cpu/o3/decode.hh UNKNOWN
src/cpu/o3/decode_impl.hh UNKNOWN
src/cpu/o3/fetch.hh UNKNOWN
src/cpu/o3/fu_pool.hh UNKNOWN
src/cpu/o3/fu_pool.cc UNKNOWN
src/cpu/o3/iew.hh UNKNOWN
src/cpu/o3/iew_impl.hh UNKNOWN
src/cpu/o3/inst_queue.hh UNKNOWN
src/cpu/o3/inst_queue_impl.hh UNKNOWN
src/cpu/o3/lsq.hh UNKNOWN
src/cpu/o3/lsq_unit.hh UNKNOWN
src/cpu/o3/mem_dep_unit.hh UNKNOWN
src/cpu/o3/mem_dep_unit.cc UNKNOWN
src/cpu/o3/rename.hh UNKNOWN
src/cpu/o3/sat_counter.hh UNKNOWN
src/cpu/quiesce_event.hh UNKNOWN
src/cpu/simple/atomic.hh UNKNOWN
src/cpu/simple/atomic.cc UNKNOWN
src/cpu/simple/base.hh UNKNOWN
src/cpu/simple/base.cc UNKNOWN
src/cpu/simple/timing.hh UNKNOWN
src/cpu/simple/timing.cc UNKNOWN
src/cpu/static_inst.hh UNKNOWN
src/dev/alpha/tsunami_cchip.cc UNKNOWN
src/dev/alpha/tsunami_io.cc UNKNOWN
src/dev/arm/pl111.hh UNKNOWN
src/dev/arm/pl111.cc UNKNOWN
src/dev/copy_engine.cc UNKNOWN
src/dev/disk_image.hh UNKNOWN
src/dev/disk_image.cc UNKNOWN
src/dev/ide_ctrl.cc UNKNOWN
src/dev/ns_gige.cc UNKNOWN
src/dev/pciconfigall.cc UNKNOWN
src/dev/pcidev.cc UNKNOWN
src/mem/cache/base.hh UNKNOWN
src/mem/cache/base.cc UNKNOWN
src/mem/cache/tags/iic.cc UNKNOWN
src/mem/cache/tags/iic_repl/gen.hh UNKNOWN
src/mem/cache/tags/iic_repl/gen.cc UNKNOWN
src/mem/cache/tags/iic_repl/repl.hh UNKNOWN
src/mem/packet.hh UNKNOWN
src/mem/ruby/system/Sequencer.hh UNKNOWN
src/python/m5/SimObject.py UNKNOWN
src/sim/core.hh UNKNOWN
src/sim/process.hh UNKNOWN
src/sim/process.cc UNKNOWN
src/sim/process_impl.hh UNKNOWN
src/sim/serialize.cc UNKNOWN
src/sim/sim_object.hh UNKNOWN
src/sim/sim_object.cc UNKNOWN
src/sim/syscall_emul.hh UNKNOWN

Diff: http://reviews.gem5.org/r/986/diff/diff


Testing
-------


Thanks,

Koan-Sin Tan
Andreas Hansson
2012-01-30 07:58:30 UTC
Permalink
-----------------------------------------------------------
This is an automatically generated e-mail. To reply, visit:
http://reviews.gem5.org/r/986/#review2009
-----------------------------------------------------------

Ship it!


Ship It!

- Andreas Hansson
Post by Nathan Binkert
-----------------------------------------------------------
http://reviews.gem5.org/r/986/
-----------------------------------------------------------
(Updated Jan. 29, 2012, 10:21 p.m.)
Review request for Default.
Description
-------
clang: Enable compiling gem5 using clang 2.9 and 3.0
This patch adds the necessary flags to the SConstruct and SConscript
files for compiling using clang 2.9 and later (on Ubuntu et al and OSX
XCode 4.2), and also cleans up a bunch of compiler warnings found by
clang. Most of the warnings are related to hidden virtual functions,
comparisons with unsigneds >= 0, and if-statements with empty
bodies. A number of mismatches between struct and class are also
fixed. clang 2.8 is not working as it has problems with class names
that occur in multiple namespaces (e.g. Statistics in
kernel_stats.hh).
clang has a bug (http://llvm.org/bugs/show_bug.cgi?id=7247) which
causes confusion between the container std::set and the function
Packet::set, and this is currently addressed by not including the
entire namespace std, but rather selecting e.g. "using std::vector" in
the appropriate places.
Diffs
-----
SConstruct UNKNOWN
ext/libelf/SConscript UNKNOWN
src/SConscript UNKNOWN
src/arch/alpha/tlb.hh UNKNOWN
src/arch/alpha/tlb.cc UNKNOWN
src/arch/arm/insts/static_inst.hh UNKNOWN
src/arch/arm/insts/vfp.hh UNKNOWN
src/arch/arm/isa/templates/basic.isa UNKNOWN
src/arch/arm/miscregs.cc UNKNOWN
src/arch/generic/memhelpers.hh UNKNOWN
src/arch/mips/faults.hh UNKNOWN
src/arch/mips/faults.cc UNKNOWN
src/arch/x86/bios/acpi.hh UNKNOWN
src/arch/x86/bios/intelmp.hh UNKNOWN
src/arch/x86/bios/intelmp.cc UNKNOWN
src/arch/x86/bios/smbios.hh UNKNOWN
src/base/fast_alloc.cc UNKNOWN
src/base/range_map.hh UNKNOWN
src/base/remote_gdb.hh UNKNOWN
src/base/stl_helpers.hh UNKNOWN
src/cpu/base.hh UNKNOWN
src/cpu/base.cc UNKNOWN
src/cpu/func_unit.hh UNKNOWN
src/cpu/inorder/cpu.hh UNKNOWN
src/cpu/inorder/cpu.cc UNKNOWN
src/cpu/inorder/resource.hh UNKNOWN
src/cpu/inorder/resource.cc UNKNOWN
src/cpu/inorder/resource_pool.hh UNKNOWN
src/cpu/inorder/resource_pool.cc UNKNOWN
src/cpu/inorder/resources/cache_unit.hh UNKNOWN
src/cpu/inorder/thread_context.cc UNKNOWN
src/cpu/nativetrace.hh UNKNOWN
src/cpu/o3/bpred_unit.hh UNKNOWN
src/cpu/o3/commit.hh UNKNOWN
src/cpu/o3/cpu.hh UNKNOWN
src/cpu/o3/cpu.cc UNKNOWN
src/cpu/o3/decode.hh UNKNOWN
src/cpu/o3/decode_impl.hh UNKNOWN
src/cpu/o3/fetch.hh UNKNOWN
src/cpu/o3/fu_pool.hh UNKNOWN
src/cpu/o3/fu_pool.cc UNKNOWN
src/cpu/o3/iew.hh UNKNOWN
src/cpu/o3/iew_impl.hh UNKNOWN
src/cpu/o3/inst_queue.hh UNKNOWN
src/cpu/o3/inst_queue_impl.hh UNKNOWN
src/cpu/o3/lsq.hh UNKNOWN
src/cpu/o3/lsq_unit.hh UNKNOWN
src/cpu/o3/mem_dep_unit.hh UNKNOWN
src/cpu/o3/mem_dep_unit.cc UNKNOWN
src/cpu/o3/rename.hh UNKNOWN
src/cpu/o3/sat_counter.hh UNKNOWN
src/cpu/quiesce_event.hh UNKNOWN
src/cpu/simple/atomic.hh UNKNOWN
src/cpu/simple/atomic.cc UNKNOWN
src/cpu/simple/base.hh UNKNOWN
src/cpu/simple/base.cc UNKNOWN
src/cpu/simple/timing.hh UNKNOWN
src/cpu/simple/timing.cc UNKNOWN
src/cpu/static_inst.hh UNKNOWN
src/dev/alpha/tsunami_cchip.cc UNKNOWN
src/dev/alpha/tsunami_io.cc UNKNOWN
src/dev/arm/pl111.hh UNKNOWN
src/dev/arm/pl111.cc UNKNOWN
src/dev/copy_engine.cc UNKNOWN
src/dev/disk_image.hh UNKNOWN
src/dev/disk_image.cc UNKNOWN
src/dev/ide_ctrl.cc UNKNOWN
src/dev/ns_gige.cc UNKNOWN
src/dev/pciconfigall.cc UNKNOWN
src/dev/pcidev.cc UNKNOWN
src/mem/cache/base.hh UNKNOWN
src/mem/cache/base.cc UNKNOWN
src/mem/cache/tags/iic.cc UNKNOWN
src/mem/cache/tags/iic_repl/gen.hh UNKNOWN
src/mem/cache/tags/iic_repl/gen.cc UNKNOWN
src/mem/cache/tags/iic_repl/repl.hh UNKNOWN
src/mem/packet.hh UNKNOWN
src/mem/ruby/system/Sequencer.hh UNKNOWN
src/python/m5/SimObject.py UNKNOWN
src/sim/core.hh UNKNOWN
src/sim/process.hh UNKNOWN
src/sim/process.cc UNKNOWN
src/sim/process_impl.hh UNKNOWN
src/sim/serialize.cc UNKNOWN
src/sim/sim_object.hh UNKNOWN
src/sim/sim_object.cc UNKNOWN
src/sim/syscall_emul.hh UNKNOWN
Diff: http://reviews.gem5.org/r/986/diff/diff
Testing
-------
Thanks,
Koan-Sin Tan
Andreas Hansson
2012-01-30 09:00:02 UTC
Permalink
Post by Nathan Binkert
Post by Andreas Hansson
Ship It!
Just to clarify, all regressions pass with this patch using both clang and gcc. The reason I wanted it re-posted is mainly two changes:

1) setRequest that is no longer an overloaded virtual function in src/cpu/inorder/resource.hh, the different resources call the setRequest in the base class rather than overloading it

2) takeOver(From) in classes that inherit from SimObject, e.g. src/cpu/o3/iew_impl.hh, they were hiding the takeOverFrom(BaseCPU*) and thus I have changed the name to takeOver in these cases. Overall, I would be very happy to change this name all together, but this is the smallest change that solves the problem.


- Andreas


-----------------------------------------------------------
This is an automatically generated e-mail. To reply, visit:
http://reviews.gem5.org/r/986/#review2009
-----------------------------------------------------------
Post by Nathan Binkert
-----------------------------------------------------------
http://reviews.gem5.org/r/986/
-----------------------------------------------------------
(Updated Jan. 29, 2012, 10:21 p.m.)
Review request for Default.
Description
-------
clang: Enable compiling gem5 using clang 2.9 and 3.0
This patch adds the necessary flags to the SConstruct and SConscript
files for compiling using clang 2.9 and later (on Ubuntu et al and OSX
XCode 4.2), and also cleans up a bunch of compiler warnings found by
clang. Most of the warnings are related to hidden virtual functions,
comparisons with unsigneds >= 0, and if-statements with empty
bodies. A number of mismatches between struct and class are also
fixed. clang 2.8 is not working as it has problems with class names
that occur in multiple namespaces (e.g. Statistics in
kernel_stats.hh).
clang has a bug (http://llvm.org/bugs/show_bug.cgi?id=7247) which
causes confusion between the container std::set and the function
Packet::set, and this is currently addressed by not including the
entire namespace std, but rather selecting e.g. "using std::vector" in
the appropriate places.
Diffs
-----
SConstruct UNKNOWN
ext/libelf/SConscript UNKNOWN
src/SConscript UNKNOWN
src/arch/alpha/tlb.hh UNKNOWN
src/arch/alpha/tlb.cc UNKNOWN
src/arch/arm/insts/static_inst.hh UNKNOWN
src/arch/arm/insts/vfp.hh UNKNOWN
src/arch/arm/isa/templates/basic.isa UNKNOWN
src/arch/arm/miscregs.cc UNKNOWN
src/arch/generic/memhelpers.hh UNKNOWN
src/arch/mips/faults.hh UNKNOWN
src/arch/mips/faults.cc UNKNOWN
src/arch/x86/bios/acpi.hh UNKNOWN
src/arch/x86/bios/intelmp.hh UNKNOWN
src/arch/x86/bios/intelmp.cc UNKNOWN
src/arch/x86/bios/smbios.hh UNKNOWN
src/base/fast_alloc.cc UNKNOWN
src/base/range_map.hh UNKNOWN
src/base/remote_gdb.hh UNKNOWN
src/base/stl_helpers.hh UNKNOWN
src/cpu/base.hh UNKNOWN
src/cpu/base.cc UNKNOWN
src/cpu/func_unit.hh UNKNOWN
src/cpu/inorder/cpu.hh UNKNOWN
src/cpu/inorder/cpu.cc UNKNOWN
src/cpu/inorder/resource.hh UNKNOWN
src/cpu/inorder/resource.cc UNKNOWN
src/cpu/inorder/resource_pool.hh UNKNOWN
src/cpu/inorder/resource_pool.cc UNKNOWN
src/cpu/inorder/resources/cache_unit.hh UNKNOWN
src/cpu/inorder/thread_context.cc UNKNOWN
src/cpu/nativetrace.hh UNKNOWN
src/cpu/o3/bpred_unit.hh UNKNOWN
src/cpu/o3/commit.hh UNKNOWN
src/cpu/o3/cpu.hh UNKNOWN
src/cpu/o3/cpu.cc UNKNOWN
src/cpu/o3/decode.hh UNKNOWN
src/cpu/o3/decode_impl.hh UNKNOWN
src/cpu/o3/fetch.hh UNKNOWN
src/cpu/o3/fu_pool.hh UNKNOWN
src/cpu/o3/fu_pool.cc UNKNOWN
src/cpu/o3/iew.hh UNKNOWN
src/cpu/o3/iew_impl.hh UNKNOWN
src/cpu/o3/inst_queue.hh UNKNOWN
src/cpu/o3/inst_queue_impl.hh UNKNOWN
src/cpu/o3/lsq.hh UNKNOWN
src/cpu/o3/lsq_unit.hh UNKNOWN
src/cpu/o3/mem_dep_unit.hh UNKNOWN
src/cpu/o3/mem_dep_unit.cc UNKNOWN
src/cpu/o3/rename.hh UNKNOWN
src/cpu/o3/sat_counter.hh UNKNOWN
src/cpu/quiesce_event.hh UNKNOWN
src/cpu/simple/atomic.hh UNKNOWN
src/cpu/simple/atomic.cc UNKNOWN
src/cpu/simple/base.hh UNKNOWN
src/cpu/simple/base.cc UNKNOWN
src/cpu/simple/timing.hh UNKNOWN
src/cpu/simple/timing.cc UNKNOWN
src/cpu/static_inst.hh UNKNOWN
src/dev/alpha/tsunami_cchip.cc UNKNOWN
src/dev/alpha/tsunami_io.cc UNKNOWN
src/dev/arm/pl111.hh UNKNOWN
src/dev/arm/pl111.cc UNKNOWN
src/dev/copy_engine.cc UNKNOWN
src/dev/disk_image.hh UNKNOWN
src/dev/disk_image.cc UNKNOWN
src/dev/ide_ctrl.cc UNKNOWN
src/dev/ns_gige.cc UNKNOWN
src/dev/pciconfigall.cc UNKNOWN
src/dev/pcidev.cc UNKNOWN
src/mem/cache/base.hh UNKNOWN
src/mem/cache/base.cc UNKNOWN
src/mem/cache/tags/iic.cc UNKNOWN
src/mem/cache/tags/iic_repl/gen.hh UNKNOWN
src/mem/cache/tags/iic_repl/gen.cc UNKNOWN
src/mem/cache/tags/iic_repl/repl.hh UNKNOWN
src/mem/packet.hh UNKNOWN
src/mem/ruby/system/Sequencer.hh UNKNOWN
src/python/m5/SimObject.py UNKNOWN
src/sim/core.hh UNKNOWN
src/sim/process.hh UNKNOWN
src/sim/process.cc UNKNOWN
src/sim/process_impl.hh UNKNOWN
src/sim/serialize.cc UNKNOWN
src/sim/sim_object.hh UNKNOWN
src/sim/sim_object.cc UNKNOWN
src/sim/syscall_emul.hh UNKNOWN
Diff: http://reviews.gem5.org/r/986/diff/diff
Testing
-------
Thanks,
Koan-Sin Tan
Nathan Binkert
2012-01-30 18:04:01 UTC
Permalink
-----------------------------------------------------------
This is an automatically generated e-mail. To reply, visit:
http://reviews.gem5.org/r/986/#review2013
-----------------------------------------------------------

Ship it!


This is great. Thanks for the effort!

- Nathan Binkert
Post by Nathan Binkert
-----------------------------------------------------------
http://reviews.gem5.org/r/986/
-----------------------------------------------------------
(Updated Jan. 29, 2012, 10:21 p.m.)
Review request for Default.
Description
-------
clang: Enable compiling gem5 using clang 2.9 and 3.0
This patch adds the necessary flags to the SConstruct and SConscript
files for compiling using clang 2.9 and later (on Ubuntu et al and OSX
XCode 4.2), and also cleans up a bunch of compiler warnings found by
clang. Most of the warnings are related to hidden virtual functions,
comparisons with unsigneds >= 0, and if-statements with empty
bodies. A number of mismatches between struct and class are also
fixed. clang 2.8 is not working as it has problems with class names
that occur in multiple namespaces (e.g. Statistics in
kernel_stats.hh).
clang has a bug (http://llvm.org/bugs/show_bug.cgi?id=7247) which
causes confusion between the container std::set and the function
Packet::set, and this is currently addressed by not including the
entire namespace std, but rather selecting e.g. "using std::vector" in
the appropriate places.
Diffs
-----
SConstruct UNKNOWN
ext/libelf/SConscript UNKNOWN
src/SConscript UNKNOWN
src/arch/alpha/tlb.hh UNKNOWN
src/arch/alpha/tlb.cc UNKNOWN
src/arch/arm/insts/static_inst.hh UNKNOWN
src/arch/arm/insts/vfp.hh UNKNOWN
src/arch/arm/isa/templates/basic.isa UNKNOWN
src/arch/arm/miscregs.cc UNKNOWN
src/arch/generic/memhelpers.hh UNKNOWN
src/arch/mips/faults.hh UNKNOWN
src/arch/mips/faults.cc UNKNOWN
src/arch/x86/bios/acpi.hh UNKNOWN
src/arch/x86/bios/intelmp.hh UNKNOWN
src/arch/x86/bios/intelmp.cc UNKNOWN
src/arch/x86/bios/smbios.hh UNKNOWN
src/base/fast_alloc.cc UNKNOWN
src/base/range_map.hh UNKNOWN
src/base/remote_gdb.hh UNKNOWN
src/base/stl_helpers.hh UNKNOWN
src/cpu/base.hh UNKNOWN
src/cpu/base.cc UNKNOWN
src/cpu/func_unit.hh UNKNOWN
src/cpu/inorder/cpu.hh UNKNOWN
src/cpu/inorder/cpu.cc UNKNOWN
src/cpu/inorder/resource.hh UNKNOWN
src/cpu/inorder/resource.cc UNKNOWN
src/cpu/inorder/resource_pool.hh UNKNOWN
src/cpu/inorder/resource_pool.cc UNKNOWN
src/cpu/inorder/resources/cache_unit.hh UNKNOWN
src/cpu/inorder/thread_context.cc UNKNOWN
src/cpu/nativetrace.hh UNKNOWN
src/cpu/o3/bpred_unit.hh UNKNOWN
src/cpu/o3/commit.hh UNKNOWN
src/cpu/o3/cpu.hh UNKNOWN
src/cpu/o3/cpu.cc UNKNOWN
src/cpu/o3/decode.hh UNKNOWN
src/cpu/o3/decode_impl.hh UNKNOWN
src/cpu/o3/fetch.hh UNKNOWN
src/cpu/o3/fu_pool.hh UNKNOWN
src/cpu/o3/fu_pool.cc UNKNOWN
src/cpu/o3/iew.hh UNKNOWN
src/cpu/o3/iew_impl.hh UNKNOWN
src/cpu/o3/inst_queue.hh UNKNOWN
src/cpu/o3/inst_queue_impl.hh UNKNOWN
src/cpu/o3/lsq.hh UNKNOWN
src/cpu/o3/lsq_unit.hh UNKNOWN
src/cpu/o3/mem_dep_unit.hh UNKNOWN
src/cpu/o3/mem_dep_unit.cc UNKNOWN
src/cpu/o3/rename.hh UNKNOWN
src/cpu/o3/sat_counter.hh UNKNOWN
src/cpu/quiesce_event.hh UNKNOWN
src/cpu/simple/atomic.hh UNKNOWN
src/cpu/simple/atomic.cc UNKNOWN
src/cpu/simple/base.hh UNKNOWN
src/cpu/simple/base.cc UNKNOWN
src/cpu/simple/timing.hh UNKNOWN
src/cpu/simple/timing.cc UNKNOWN
src/cpu/static_inst.hh UNKNOWN
src/dev/alpha/tsunami_cchip.cc UNKNOWN
src/dev/alpha/tsunami_io.cc UNKNOWN
src/dev/arm/pl111.hh UNKNOWN
src/dev/arm/pl111.cc UNKNOWN
src/dev/copy_engine.cc UNKNOWN
src/dev/disk_image.hh UNKNOWN
src/dev/disk_image.cc UNKNOWN
src/dev/ide_ctrl.cc UNKNOWN
src/dev/ns_gige.cc UNKNOWN
src/dev/pciconfigall.cc UNKNOWN
src/dev/pcidev.cc UNKNOWN
src/mem/cache/base.hh UNKNOWN
src/mem/cache/base.cc UNKNOWN
src/mem/cache/tags/iic.cc UNKNOWN
src/mem/cache/tags/iic_repl/gen.hh UNKNOWN
src/mem/cache/tags/iic_repl/gen.cc UNKNOWN
src/mem/cache/tags/iic_repl/repl.hh UNKNOWN
src/mem/packet.hh UNKNOWN
src/mem/ruby/system/Sequencer.hh UNKNOWN
src/python/m5/SimObject.py UNKNOWN
src/sim/core.hh UNKNOWN
src/sim/process.hh UNKNOWN
src/sim/process.cc UNKNOWN
src/sim/process_impl.hh UNKNOWN
src/sim/serialize.cc UNKNOWN
src/sim/sim_object.hh UNKNOWN
src/sim/sim_object.cc UNKNOWN
src/sim/syscall_emul.hh UNKNOWN
Diff: http://reviews.gem5.org/r/986/diff/diff
Testing
-------
Thanks,
Koan-Sin Tan
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