[gem5-dev] Change in gem5/gem5[master]: arch-arm: correctly set floats from GDB on aarch64

[Ciro Santilli (Gerrit)]

Ciro Santilli has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/14498


Change subject: arch-arm: correctly set floats from GDB on aarch64
......................................................................

arch-arm: correctly set floats from GDB on aarch64

aarch64 floating point registers are now stored as vector type, but this
was not updated in the stub.

Change-Id: I4a2bc1cea0eec9beeb5bbd49e2a868b9d5ed0a42
---
M src/arch/arm/remote_gdb.cc
M src/arch/arm/remote_gdb.hh
2 files changed, 16 insertions(+), 11 deletions(-)



diff --git a/src/arch/arm/remote_gdb.cc b/src/arch/arm/remote_gdb.cc
index 38207d4..f3ffa85 100644
--- a/src/arch/arm/remote_gdb.cc
+++ b/src/arch/arm/remote_gdb.cc
@@ -203,11 +203,13 @@
r.pc = context->pcState().pc();
r.cpsr = context->readMiscRegNoEffect(MISCREG_CPSR);

- for (int i = 0; i < 32*4; i += 4) {
- r.v[i + 0] = context->readFloatRegBits(i + 2);
- r.v[i + 1] = context->readFloatRegBits(i + 3);
- r.v[i + 2] = context->readFloatRegBits(i + 0);
- r.v[i + 3] = context->readFloatRegBits(i + 1);
+ size_t base = 0;
+ for (int i = 0; i < NumVecV8ArchRegs; i++) {
+ auto v = (context->readVecReg(RegId(VecRegClass,
i))).as<VecElem>();
+ for (size_t j = 0; j < NumVecElemPerVecReg; j++) {
+ r.v[base] = v[j];
+ base++;
+ }
}
}

@@ -227,11 +229,14 @@
// mapped.
context->setIntReg(INTREG_SPX, r.spx);

- for (int i = 0; i < 32*4; i += 4) {
- context->setFloatRegBits(i + 2, r.v[i + 0]);
- context->setFloatRegBits(i + 3, r.v[i + 1]);
- context->setFloatRegBits(i + 0, r.v[i + 2]);
- context->setFloatRegBits(i + 1, r.v[i + 3]);
+ size_t base = 0;
+ for (int i = 0; i < NumVecV8ArchRegs; i++) {
+ auto v = (context->getWritableVecReg(
+ RegId(VecRegClass, i))).as<VecElem>();
+ for (size_t j = 0; j < NumVecElemPerVecReg; j++) {
+ v[j] = r.v[base];
+ base++;
+ }
}
}

diff --git a/src/arch/arm/remote_gdb.hh b/src/arch/arm/remote_gdb.hh
index e59d7b0..10fcb6d 100644
--- a/src/arch/arm/remote_gdb.hh
+++ b/src/arch/arm/remote_gdb.hh
@@ -96,7 +96,7 @@
uint64_t spx;
uint64_t pc;
uint32_t cpsr;
- uint32_t v[32*4];
+ VecElem v[NumVecV8ArchRegs * NumVecElemPerVecReg];
} M5_ATTR_PACKED r;
public:
char *data() const { return (char *)&r; }
--
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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: I4a2bc1cea0eec9beeb5bbd49e2a868b9d5ed0a42
Gerrit-Change-Number: 14498
Gerrit-PatchSet: 1
Gerrit-Owner: Ciro Santilli <***@arm.com>
Gerrit-MessageType: newchange